25M02GVTCIG 参数 Datasheet PDF下载

型号：	25M02GVTCIG
PDF下载：	下载PDF文件查看货源
内容描述：	[3V 2G-BIT (2 x 1G-BIT) SERIAL SLC NAND FLASH MEMORY WITH DUAL/QUAD SPI BUFFER READ & CONTINUOUS READ CONCURRENT OPERATIONS]
分类和应用：
文件页数/大小：	68 页 / 820 K
品牌：	WINBOND [ WINBOND ]

W25M02GV

8.2.3 Read JEDEC ID (9Fh)

The Read JEDEC ID instruction is compatible with the JEDEC standard for SPI compatible serial

memories that was adopted in 2003. The instruction is initiated by driving the /CS pin low and shifting the

instruction code “9Fh” followed by 8 dummy clocks. The JEDEC assigned Manufacturer ID byte for

Winbond (EFh) and two Device ID bytes are then shifted out on the falling edge of CLK with most

significant bit (MSB) first as shown in Figure 6. For memory type and capacity values refer to

Manufacturer and Device Identification table.

Figure 6. Read JEDEC ID Instruction

Publication Release Date: July 1, 2015

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Preliminary - Revision B

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