W25M02GV
8.1.3 Instruction Set Table 2 (Buffer Read, BUF = 1, xxIG Default Power Up Mode)(12)
Commands
OpCode
Byte2
Byte3
Byte4
Byte5
Byte6
Byte7
Byte8
Byte9
Device RESET
Software Die Select
JEDEC ID
FFh
C2h
9Fh
Die ID7-0
Dummy
SR Addr
SR Addr
EFh
S7-0
S7-0
ABh
S7-0
21h
Read Status Register
Write Status Register
Write Enable
0Fh / 05h
1Fh / 01h
06h
S7-0
S7-0
S7-0
S7-0
S7-0
Write Disable
04h
BB Management
(Swap Blocks)
A1h
LBA
LBA
LBA0
PBA
LBA0
PBA
Read BBM LUT
A5h
Dummy
Dummy
Dummy
CA15-8
CA15-8
CA15-8
CA15-8
Dummy
Dummy
CA15-8
CA15-8
CA15-8
CA15-8
CA15-8
CA15-8
CA15-8
CA15-8 / 2
CA15-8 / 2
CA15-8 / 4
CA15-8 / 4
PBA0
PBA0
LBA1
LBA1
PBA1
Last ECC failure
Page Address
A9h
PA15-8
PA15-8
CA7-0
PA7-0
Block Erase
D8h
02h
PA7-0
Program Data Load
(Reset Buffer)
Data-0
Data-1
Data-1
Data-2
Data-2
Data-3
Data-3
Data-4
Data-4
Data-5
Data-5
Random Program
Data Load
84h
CA7-0
Data-0
Quad Program
Data Load (Reset Buffer)
32h
CA7-0
Data-0 / 4
Data-0 / 4
PA7-0
Data-1 / 4
Data-1 / 4
Data-2 / 4
Data-2 / 4
Data-3 / 4
Data-3 / 4
Data-4 / 4
Data-4 / 4
Data-5 / 4
Data-5 / 4
Random Quad Program
Data Load
34h
CA7-0
Program Execute
Page Data Read
Read
10h
PA15-8
PA15-8
CA7-0
13h
PA7-0
03h
Dummy
Dummy
Dummy
Dummy
Dummy
Dummy
Dummy
Dummy / 2
Dummy / 2
Dummy / 4
Dummy / 4
D7-0
D7-0
D7-0
D7-0
D7-0
D7-0
D7-0
D7-0
D7-0
Fast Read
0Bh
0Ch
3Bh
3Ch
6Bh
6Ch
BBh
BCh
EBh
ECh
CA7-0
D7-0
Fast Read
with 4-Byte Address
CA7-0
Dummy
D7-0 / 2
Dummy
D7-0 / 4
Dummy
D7-0 / 2
Dummy / 2
Dummy / 4
Dummy / 4
Dummy
D7-0 / 2
Dummy
D7-0 / 4
Dummy
D7-0 / 2
Dummy / 2
D7-0 / 4
Dummy / 4
D7-0
D7-0
D7-0
Fast Read Dual Output
CA7-0
D7-0 / 2
D7-0 / 2
D7-0 / 4
D7-0 / 4
D7-0 / 2
D7-0 / 2
D7-0 / 4
Dummy / 4
D7-0 / 2
D7-0 / 2
D7-0 / 4
D7-0 / 4
D7-0 / 2
D7-0 / 2
D7-0 / 4
Dummy / 4
D7-0 / 2
D7-0 / 2
D7-0 / 4
D7-0 / 4
D7-0 / 2
D7-0 / 2
D7-0 / 4
D7-0 / 4
Fast Read Dual Output
with 4-Byte Address
CA7-0
Fast Read Quad Output
CA7-0
Fast Read Quad Output
with 4-Byte Address
CA7-0
Fast Read Dual I/O
CA7-0 / 2
CA7-0 / 2
CA7-0 / 4
CA7-0 / 4
Fast Read Dual I/O
with 4-Byte Address
Fast Read Quad I/O
Fast Read Quad I/O
with 4-Byte Address
Publication Release Date: July 1, 2015
Preliminary - Revision B
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