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25M02GVTCIG 参数 Datasheet PDF下载

25M02GVTCIG图片预览
型号: 25M02GVTCIG
PDF下载: 下载PDF文件 查看货源
内容描述: [3V 2G-BIT (2 x 1G-BIT) SERIAL SLC NAND FLASH MEMORY WITH DUAL/QUAD SPI BUFFER READ & CONTINUOUS READ CONCURRENT OPERATIONS]
分类和应用:
文件页数/大小: 68 页 / 820 K
品牌: WINBOND [ WINBOND ]
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W25M02GV  
8.2.2 Device Reset (FFh)  
Because of the small package and the limitation on the number of pins, the W25M02GV provide a  
software Reset instruction instead of a dedicated RESET pin. Once the Reset instruction is accepted, any  
on-going internal operations will be terminated and the device will return to its default power-on state and  
lose all the current volatile settings, such as Volatile Status Register bits. Once the Reset command is  
accepted by the device, the device will take approximately tRST to reset, depending on the current  
operation the device is performing, tRST can be 5us~500us. During this period, no command will be  
accepted. Also, “Software Die Select (C2h)” should not be issued during the maximum tRST (500us) time  
period to avoid possible die selection confusion due to the reset state of the dies.  
Data corruption may happen if there is an on-going internal Erase or Program operation when Reset  
command sequence is accepted by the device. It is recommended to check the BUSY bit in Status  
Register before issuing the Reset command.  
/CS  
Mode 3  
Mode 0  
0
1
2
3
4
5
6
7
Mode 3  
Mode 0  
CLK  
Instruction (FFh)  
DI  
(IO0)  
High Impedance  
DO  
(IO1)  
Figure 5. Device Reset Instruction  
Default values of the Status Registers after power up and Device Reset  
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