WED9LC6816V
White Electronic Designs
FIG. 5 SDRAM SINGLE BIT READ-WRITE-READ CYCLE (SAME PAGE) @
CAS LATENCY = 3, BURST LENGTH = 1
6
0
1
2
3
4
5
7
8
9
10
11
12
13
14
15
16
17
18
19
SDCK
tCH
t
CL
tCC
tRCD
tRAS
SDCE#
t
SS
tSH
tRP
tRCD
tSH
tSS
SDRAS#
t
CCD
tSS
tSH
SDCAS#
ADDR
tSS
tSH
tSH
tSS
Cb
BS
Cc
Ra
Ca
Rb
BA0, 1
BS
Rb
BS
Ra
BS
BS
BS
[A12,A13
]
SDA10
tRAC
t
SS
SS
SS
t
SH
t
SAC
Qa
Db
Qc
DQ
t
SLZ
tOH
t
t
tSH
SDWE#
t
SH
BWE#
Read
Read
Write
Row Active
Row Active
DON’T CARE
Precharge
Contact factory for ordering information.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
September, 2003
Rev. 1
14
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
