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WED9LC6816V1312BI 参数 Datasheet PDF下载

WED9LC6816V1312BI图片预览
型号: WED9LC6816V1312BI
PDF下载: 下载PDF文件 查看货源
内容描述: 256Kx32 SSRAM / SDRAM 4Mx32 [256Kx32 SSRAM/4Mx32 SDRAM]
分类和应用: 存储内存集成电路静态存储器动态存储器
文件页数/大小: 27 页 / 1138 K
品牌: WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
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WED9LC6816V  
White Electronic Designs  
SDRAM Current State Truth Table (cont.)  
Command  
Current State  
Action  
Notes  
SDCE#  
SDRAS #  
SDCAS#  
SDWE#  
A12 & A13 (BA)  
A11-A0  
Description  
Mode Register Set  
Auto or Self Refresh  
Precharge  
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
OP Code  
ILLEGAL  
ILLEGAL  
X
X
X
L
H
H
L
X
Row Address  
Column  
Column  
X
ILLEGAL  
2
2
L
H
L
BA  
BA  
BA  
X
Bank Activate  
Write  
ILLEGAL  
Write with Auto  
Precharge  
H
H
H
H
ILLEGAL  
L
H
L
Read  
ILLEGAL  
H
H
Burst Termination  
No Operation  
ILLEGAL  
H
X
X
Continue the Burst  
H
X
X
X
X
X
Device Deselect  
Continue the Burst  
L
L
L
L
L
L
L
L
L
L
L
H
L
OP Code  
Mode Register Set  
Auto or Self Refresh  
Precharge  
ILLEGAL  
ILLEGAL  
X
X
H
H
X
X
No Operation; Bank(s) idle after tRP  
ILLEGAL  
H
BA  
Row Address  
Bank Activate  
2
2
L
H
L
L
BA  
Column  
Write w/o Precharge  
ILLEGAL  
Precharging  
L
L
L
H
H
H
L
H
H
H
L
BA  
X
Column  
Read w/o Precharge  
Burst Termination  
No Operation  
ILLEGAL  
20  
X
X
No Operation; Bank(s) idle after tRP  
No Operation; Bank(s) idle after tRP  
H
X
H
X
X
X
X
X
Device Deselect  
No Operation; Bank(s) idle after tRP  
L
L
L
L
L
L
L
L
H
L
L
L
L
L
H
L
OP Code  
OP Code  
OP Code  
Mode Register Set  
Auto or Self Refresh  
Precharge  
ILLEGAL  
ILLEGAL  
X
X
X
L
H
H
L
X
ILLEGAL  
2
2
2
2
L
H
L
BA  
BA  
BA  
X
Row Address  
Bank Activate  
Write  
ILLEGAL  
Row Activating  
H
H
H
H
X
Column  
ILLEGAL  
L
H
L
Column  
Read  
ILLEGAL  
H
H
X
X
X
X
Burst Termination  
No Operation  
Device Deselect  
No Operation; Row active after tRCD  
No Operation; Row active after tRCD  
No Operation; Row active after tRCD  
H
X
X
X
L
L
L
L
Mode Register Set  
ILLEGAL  
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
H
H
L
H
L
X
X
X
Auto or Self Refresh  
Precharge  
ILLEGAL  
ILLEGAL  
X
2
2
6
6
L
H
L
BA  
BA  
BA  
X
Row Address  
Bank Activate  
Write  
ILLEGAL  
Write  
Recovering  
H
H
H
H
X
L
Column  
Start Write; Determine if Auto Precharge  
Start Read; Determine if Auto Precharge  
No Operation; Precharge after tDPL  
No Operation; Precharge after tDPL  
No Operation; Precharge after tDPL  
ILLEGAL  
L
H
L
Column  
Read  
H
H
X
L
X
X
X
Burst Termination  
No Operation  
Device Deselect  
Mode Register Set  
Auto or Self Refresh  
Precharge  
H
X
L
X
X
L
L
H
L
X
X
X
ILLEGAL  
L
H
H
L
X
Row Address  
Column  
Column  
X
ILLEGAL  
2
L
H
L
BA  
BA  
BA  
X
Bank Activate  
Write  
ILLEGAL  
2
With Recovering  
with Auto  
Precharging  
H
H
H
H
ILLEGAL  
2,6  
2,6  
L
H
L
Read  
ILLEGAL  
H
H
Burst Termination  
No Operation  
No Operation; Precharge after tDPL  
No Operation; Precharge after tDPL  
H
X
X
H
X
X
X
X
X
Device Deselect  
No Operation; Precharge after tDPL  
Contact factory for ordering information.  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
September, 2003  
Rev. 1  
12  
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
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