Preliminary
VG37648041AT
256M:x4, x8, x16
VIS
CMOS Synchronous Dynamic RAM
AUTO REFRESH MODE
t
t
t
CH
CL
CK
CLK#
CLK
t
t
IS IH
CKE
VALID
NOP
VALID
t
t
IS
IH
PRE
AR
NOP
NOP
NOP
ACT
NOP
NOP
AR
COMMAND
A0-A8
RA
RA
A9,A11,A12
ALL BANKS
ONE BANK
A10
RA
BA
t
t
IS
IH
*Bank(s)
BA0,BA1
DQS
DQ
DM
t
t
t
RC
RC
RP
DONT’ CARE
UNDEFINED
DIS AP=Disable Autoprecharge
*=*Dont’ Care”, if A10 is HIGH at this point; A10 must be HIGH if more than one bank is active(i.e. must pre-
charge all active banks)
PRE=PRECHARGE, ACT=ACTIVE, RA=Row Address, BA=Bank Address, AR=AUTOREFRESH
NOP commands are shown for ease of illustration; other valid commands may be possible at these times
DM, DQ and DQS signals are all *Dont’ Care”/High-Z for operations shown
Document : 1G5-0157
Rev.1
Page78