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VG37648041AT 参数 Datasheet PDF下载

VG37648041AT图片预览
型号: VG37648041AT
PDF下载: 下载PDF文件 查看货源
内容描述: 256M : X4,X8 , X16 CMOS同步动态RAM [256M:x4, x8, x16 CMOS Synchronous Dynamic RAM]
分类和应用:
文件页数/大小: 86 页 / 964 K
品牌: VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
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Preliminary  
VG37648041AT  
256M:x4, x8, x16  
VIS  
CMOS Synchronous Dynamic RAM  
Data for any WRITE burst may be followed by a subsequent PRECHARGE command. To follow a WRITE with  
out truncating the write burst, tWR should be met as shown in Figures 28 and 29.  
Data for any WRITE burst may be truncated by a subsequent PRECHARGE command, as shown in Figures  
30-33. Note that only the data -in pairs that are registered prior to the tWR period are written to the internal array,  
and any subsequent data-in should be masked with DM (through one-half clock after the READ command). Fol-  
lowing the PRECHARGE command, a subsequent command to the same bank can not be issued until tRP is  
met.  
In the case of a write burst being executed to completion, a PRECHARGE command issued at the optimum  
time (as described above) provides the same operation that would result from the same burst with AUTO PRE-  
CHARGE. The disadvantage of the PRECHARGE command is that it requires that the command and address  
buses be available at the appropriate time to issue the command. The advantage of the PRECHARGE command  
is that it can be used to truncate bursts.  
Document : 1G5-0157  
Rev.1  
Page42  
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