Preliminary
VG37648041AT
256M:x4, x8, x16
VIS
CMOS Synchronous Dynamic RAM
T0
T1
T2
T3
T4
T5
T7
T6
CLK#
CLK
COMMAND
ADDRESS
WRITE
NOP
NOP
NOP
Bank a,
Col b
t
DSS
max
DQS
DQ
Dl
b
DM
DONT’ CARE
UNDEFINED
Dl b=Data In for column b
3 subsequent elements of Data In are applied in the programmed order following Dl b
A non-interrupted burst of 4 is shown
A10 is LOW with the WRITE command (AUTO PRECHARGE is disabled)
Figure 15
WRITE BURST - MAX DSS
Document : 1G5-0157
Rev.1
Page40