VG3617161ET
1,048,576 x 16 - Bit
CMOS Synchronous Dynamic RAM
VIS
Full Page Random Column Write
Burst Length=Full Page, CAS Latency=2
T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
CLK
CKE
t
CK2
CS
RAS
CAS
WE
A11(BS)
RAa
RAa
RBa
RBb
RBb
A10
A0~A9
RBa CAa CBa
CAc
CBc
CAb
CBb
t
RP
DQM
DQ
Hi-Z
QAa0 QBa0
QBb0 QBb1
QAc0
QAc1
QAc2
QBc1 QBc2
QAb0 QAb1
QBc0
Write
Command
Bank B
Write
Command
Bank B
Precharge
Command Bank B
(Precharge Termination)
Write
Command
Bank A
Write
Command
Bank B
Activate
Command
Bank A
Activate
Command
Bank B
Activate
Command
Bank B
Write Data
is masked
Write
Command
Bank A
Write
Command
Bank A
Document:1G5-0189
Rev.1
Page66
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
