VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
VSC9182
Features
• 64x64 STS-12/STM-4 TSI Switch with Non-
blocking 768x768 STS-1 Switch Matrix
• Supports Both Multicast and Broadcast
• Serial LVDS 622Mb/s High-Speed Interface with
PECL/CML Compatibility and Retiming
• 50MHz 11-Bit Microprocessor Interface
• IEEE P1149.1 Test Access Port
• Compatible with VSC918x Pointer Processors
• Integrated Clock Synthesis with a Choice of Two
Reference Frequencies
64x64 STS-12/STM-4 TSI Switch Fabric
• AIS and Unequipped Signal Insertion
• LOS Detection, Input Parity Checking and Output
Parity Insertion; Scrambling and Descrambling
• Hitless Reconfiguration of TSI Mapping
• Single +3.3V Power Supply
• Compliant with Relevelant SONET/SDH Require-
ments as Stated in ANSI T1.105, Bellcore GR-
253-CORE and ITU-T G.707
• Thermally-Enhanced 37.5mm 480 BGA Package
General Description
The VSC9182 is a 64x64 STS-12/STM-4 Time Slot Interchange Switch IC for Cross Connection and Ring
Protection Switching of STS(n) tributaries. All STS-12/STM-4 inputs and outputs are differential serial signals
running at 622.08Mb/s for efficiency in switch card and system backplane design. Using the STS-192/STM-64
Pointer Processor and Frame Aligner IC (VSC9186) and four VSC9182 devices in parallel, a 16x16 STS-192/
STM-64 switch can be constructed.
Block Diagram
SYNCP/N
FOSYNCP/N
RXD[63..0]+/-
indexer
input
backplane
interfaces
(64)
Clock
Data
Interconnection
Matrix
and Storage
Data
output
backplane
interfaces
(64)
TXD[63..0]+/-
SYSCLKP/N
Clock
Synthesis
PLL
Control
CPU
Interface
Control
Test
Interface
D[9..0]
A[10..0]
ALE
CSB
WRB
RDB
CONFIG
INTB
CKBYP
PLOCK
CKSEL
PRTYON
SCRMBL
IDDQ1
IDDQ2
CTM
ATM0
ATM1
TACO
TDI
TCK
TMS
TRSTB
TDO
RSTB
G52289, Rev 4.1
12/6/01
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
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