VSC8601 Datasheet
Configuration
Table 51.
CMODE Resistor Values and Resultant Bit Settings (continued)
With 1%
Resistor
Value
With CMODE
Pin Tied To
Set
Set
Bit 2 to:
Set
Bit 1 to:
Set
Bit 3 (MSB) to:
Bit 0 (LSB) to:
VSS
8.25 kΩ
12.1 kΩ
16.9 kΩ
22.6 kΩ
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
VSS
VSS
VSS
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
VDD33
2.26 kΩ
4.02 kΩ
5.90 kΩ
8.25 kΩ
12.1 kΩ
16.9 kΩ
22.6 kΩ
Using resistors with the CMODE pins can be optional in designs that access the device’s
MDC/MDIO pins. In designs that do this, all configurations otherwise affected on the
device by using the CMODE pins can be changed using the regular device register
settings, and all the CMODE pins can be pulled to VSS (ground). However, the
PHYADDR [4:0] still requires CMODE configuration.
4.5
EEPROM
The VSC8601 device EEPROM interface makes it possible to set up the device to
self-configure its internal registers based on the information programmed into and
stored in an external device. To accomplish this, the EEPROM is read on power-up or
de-assertion of the NRESET bit. For field configuration, the EEPROM can also be
accessed using VSC8601 device registers 21E and 22E.
The EEPROM used to interface to the VSC8601 device must have a two-wire interface. A
device such as the Atmel part AT24CXXX is suggested.
As defined by the interface, data is clocked from the VSC8601 device on the falling
edge of EECLK. The device determines that an external EEPROM is present if EEDAT is
connected to a 4.7 kΩ external pull-up resistor. The EEDAT pin can be left floating or
grounded to indicate that no EEPROM is present.
4.5.1
EEPROM Contents Description
When an EEPROM is present, the VSC8601 device looks for the command header,
0xBDBD at address 0 and 1 of the EEPROM. The address is incremented by 256 until
the header is found. If the header is not found or no EEPROM is connected, the
VSC8601 device bypasses the EEPROM read step.
When an EEPROM is present, the VSC8601 device waits for an acknowledgement for
approximately three seconds (in accordance with the ATMEL EEPROM protocol). If there
Revision 4.1
September 2009
Page 66
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