VSC8115
Data Sheet
PACKAGE INFORMATION
VDDA
DATAIN+
DATAIN–
VSSA
1
2
20
19
18
17
16
15
14
13
12
11
VDDA
VSSA
3
CAP+
4
CAP–
LOCKDET
STS12
5
BYPASS
SD
VSC8115
Top View
6
REFCLK
LOCKREFN
VSS
7
DATAOUT+
DATAOUT–
CLKOUT+
CLKOUT–
8
9
VDD
10
Figure 6. Pin Diagram for 20-Pin TSSOP (YA, YA-02, YA-03, YA-T)
Table 12. Pin Identifications for 20-Pin TSSOP (YA, YA-02, YA-03, YA-T)
Pin
1
Signal
VDDA
I/O
Type
Description
Pwr
+3.3V power supply for high-speed I/Os and on-chip PLL blocks.
2
DATAIN+
I
I
LVDS/
PECL
Receive Data Input, True. The high-speed output clock (CLKOUT ) is
recovered from this high-speed differential input data.
3
DATAIN–
LVDS/
PECL
Receive Data Input, Complement. The high-speed output clock (CLKOUT )
is recovered from this high-speed differential input data.
4
5
VSSA
Pwr
Ground pin for low-speed I/Os and on-chip digital PLL blocks.
LOCKDET
O
LVPECL Active HIGH to indicate that the PLL is locked to serial data input and valid
clock and data are present at the serial outputs (DATAOUT and CLKOUT ).
The LOCKDET will go inactive under the following conditions:
• If SD is set LOW
• If LOCKREFN is set LOW
• If the VCO has drifted away from the local reference clock, REFCLK, by
more than 500ppm.
6
7
STS12
I
I
LVTTL
LVTTL
STS-12 or STS-3 Mode Selection. Set HIGH to select the STS-12 operation.
Set LOW to select the STS-3 operation.
REFCLK
Local Reference Clock Input for the CRU, 19.44MHz. REFCLK is used for the
PLL phase adjustment during power up and also serves as a stable clock
source in the absence of serial input data.
8
LOCKREFN
I
LVTTL
Lock to REFCLK Input. When set LOW, it holds the CLKOUT output to
within 500ppm of the REFCLK input and forces the DATAOUT output to the
LOW state.
9
VSS
VDD
Pwr
Pwr
Ground pin for low-speed I/Os and on-chip digital CMOS blocks.
+3.3V power supply for low-speed I/Os and on-chip digital CMOS blocks.
High-Speed Clock Output, Complement. This clock is recovered from the
10
11
CLKOUT–
O
LVDS/
LVPECL receive data input (DATAIN ) and can be configured as either a LVDS or
LVPECL signal.
9 of 12
G52272, Rev 4.2
5/14/03
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
