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VSC8113QB2 参数 Datasheet PDF下载

VSC8113QB2图片预览
型号: VSC8113QB2
PDF下载: 下载PDF文件 查看货源
内容描述: ATM / SONET / SDH 622 Mb / s的收发器复用/解复用,集成时钟发生器和时钟恢复 [ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux with Integrated Clock Generation and Clock Recovery]
分类和应用: 时钟发生器ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 28 页 / 486 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
VSC8113
ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux
with Integrated Clock Generation and Clock Recovery
Jitter Tolerance
Jitter Tolerance is the ability of the Clock Recovery Unit to track timing variation in the received data
stream. The bellcore and ITU specifications allow the received optical data to contain jitter. The amount that
must be tolerated is a function of the frequency of the jitter. At high frequencies the specifications do not require
the CRU to tolerate large amounts, whereas at low frequencies many unit intervals (bit times) of jitter have to be
tolerated. The CRU is designed to tolerate this jitter with margin over the specification limits, see Figure 7. The
CRU obtains and maintains lock based on the data transition information. When there is no transition on the
data stream, the recovered clock frequency can drift. The VSC8113 can maintain lock over 100 bits of no
switching on data stream.
Figure 7: Jitter Tolerance
J
ITTER
(UI
P
-
P
)
150
Bellcore Requirement
60
VSC8113 Guaranteed
Jitter Tolerance
15
6
1.5
0.6
0.15
10
30
300
25
K
250
K
2.5M
J
ITTER
F
REQ
(H
Z
)
G52154-0, Rev 4.2
3/19/99
©
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Page 9