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VSC8113QB2 参数 Datasheet PDF下载

VSC8113QB2图片预览
型号: VSC8113QB2
PDF下载: 下载PDF文件 查看货源
内容描述: ATM / SONET / SDH 622 Mb / s的收发器复用/解复用,集成时钟发生器和时钟恢复 [ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux with Integrated Clock Generation and Clock Recovery]
分类和应用: 时钟发生器ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 28 页 / 486 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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VITESSE
SEMICONDUCTOR CORPORATION
ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux
with Integrated Clock Generation and Clock Recovery
Figure 6: External Integrator Capacitor
CP = 0.1
µF
CP1
CP2
Data Sheet
VSC8113
+
-
CN1
CN2
CN = 0.1
µF
Clock Recovery
The fully monolithic Clock Recovery Unit (CRU) consists of a Phase Detector, a Frequency Detector, a
Loop Filter and a Voltage Controlled Oscillator (VCO). The phase detector compares the phase information of
the incoming data with the recovered clock. The frequency detector compares the frequency component of the
data input with the recovered clock to provide the pull in energy during lock acquisition. The LoopFilter inte-
grates the phase information from the phase and frequency detectors and provides the control voltage to the
VCO.
The CRU provides a lock detect function. If the frequencies of the serial data stream and the CRU’s recov-
ered clock are different, a data bit in the serial data stream will occasionally be dropped. If the Frequency Detec-
tor does not detect this condition in a moving 1.5
µs
window, the CRULOCKDET output is asserted to signal
that the CRU is frequency locked to the serial data stream. This output is forced low if it detects that a data bit is
dropped or if the recovered clock frequency drifts more than 5% from the CMU’s output frequency.
Page 8
©
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52154-0, Rev 4.2
3/19/99