欢迎访问ic37.com |
会员登录 免费注册
发布采购

VSC8025TQ 参数 Datasheet PDF下载

VSC8025TQ图片预览
型号: VSC8025TQ
PDF下载: 下载PDF文件 查看货源
内容描述: [Mux/Demux, 1-Func, PBGA192, TBGA-192]
分类和应用: ATM异步传输模式电信电信集成电路
文件页数/大小: 42 页 / 673 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
 浏览型号VSC8025TQ的Datasheet PDF文件第23页浏览型号VSC8025TQ的Datasheet PDF文件第24页浏览型号VSC8025TQ的Datasheet PDF文件第25页浏览型号VSC8025TQ的Datasheet PDF文件第26页浏览型号VSC8025TQ的Datasheet PDF文件第28页浏览型号VSC8025TQ的Datasheet PDF文件第29页浏览型号VSC8025TQ的Datasheet PDF文件第30页浏览型号VSC8025TQ的Datasheet PDF文件第31页  
VITESSE  
SEMICONDUCTOR CORPORATION  
Datasheet  
2.488 Gb/s ATM/SDH/SONET STM-16/STS-48  
Mux/Demux and Section Terminator IC Chipset  
VSC8025/VSC8026  
VSC8026 Power Dissipation  
Table 15: VSC8026 Power Supply Currents (Outputs Open)  
Parameter  
Description  
(Max)  
Units  
ITT  
ITTL  
IDD  
PD  
Power supply current from VTT  
Power supply current from VTTL  
Power supply current from VDD  
Power dissipation  
2.37  
75  
A
mA  
mA  
W
266  
6.7  
VSC8026 Package Pin Description  
Table 16: Pin Identification Table  
Signal  
Pin  
I/O  
Level  
Pin Description  
Test enable (tie to -2V)  
VSCTE  
N/C  
A01  
A02  
A03  
A04  
A05  
A06  
A07  
A08  
A09  
A10  
A11  
A12  
A13  
A14  
A15  
A16  
B01  
B02  
B03  
B04  
B05  
B06  
B07  
B08  
B09  
I
-2V  
No connection (leave open)  
-2.0V power supply  
VTT  
PWR  
I
-2V  
RXPCLKIN+  
N/C  
ECL  
Receive parallel clock in  
No connection (leave open) No connection (leave open)  
Serial loop back clock out  
Serial loop back clock out  
Receive parallel frame pulse in  
Receive parallel data in  
Receive parallel data in  
Receive parallel data in  
Receive parallel data in  
Receive parallel data in  
Ground  
RXSLBCLK+  
RXSLBCLK-  
RXFPIN  
RXPIN1  
RXPIN2  
RXPIN3  
RXPIN5  
RXPIN7  
VCC  
O
HSECL  
HSECL  
ECL  
O
I
I
ECL  
I
ECL  
I
ECL  
I
I
ECL  
ECL  
PWR  
GND  
N/C  
No connection (leave open)  
No connection (leave open)  
No connection (leave open)  
Loss of signal (active high)  
No connection (leave open)  
No connection (leave open)  
Receive parallel clock in  
No connection (leave open)  
Ground  
N/C  
N/C  
LOS  
I
TTL  
N/C  
N/C  
RXPCLKIN-  
N/C  
I
PWR  
I
ECL  
GND  
ECL  
VCC  
N/C  
No connection (leave open)  
Receive parallel data in  
RXPIN0  
G52182-0, Rev. 4.0  
1/5/00  
VITESSE SEMICONDUCTOR CORPORATION  
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896  
Page 27  
 复制成功!