VITESSE
SEMICONDUCTOR CORPORATION
Datasheet
2.488 Gb/s ATM/SDH/SONET STM-16/STS-48
Mux/Demux and Section Terminator IC Chipset
VSC8025/VSC8026
Table 16: Pin Identification Table
Signal
Pin
I/O
Level
Pin Description
VCC
VCC
N09
N10
N11
N12
N13
N14
N15
N16
P01
P02
P03
P04
P05
P06
P07
P08
P09
P10
P11
P12
P13
P14
P15
P16
R01
R02
R03
R04
R05
R06
R07
R08
R09
R10
R11
R12
R13
R14
PWR
PWR
PWR
GND
GND
GND
Ground
Ground
VCC
Ground
N/C
No connection (leave open)
No connection
N/C
VCC
PWR
GND
TTL
TTL
GND
TTL
TTL
Ground
RXCLKOUTB
RXCLKOUTA
VCC
O
Receive parallel data clock out B
Receive parallel data clock out A
Ground
O
PWR
EQULOOP
FACLOOP
N/C
I
I
Equipment loop back enable (active high)
Facility loop back enable (active high)
No connection (leave open)
Ground
VCC
PWR
PWR
PWR
PWR
PWR
PWR
PWR
PWR
GND
-2V
VTT
-2.0V power supply
+3.3V power supply
-2.0V power supply
-2.0V power supply
+3.3V power supply
-2.0V power supply
Ground
VTTL
+3.3V
-2V
VTT
VTT
-2V
VTTL
+3.3V
-2V
VTT
VCC
GND
N/C
No connection (leave open)
No connection (leave open)
Test output (leave open)
Ground
N/C
VSCOPNC
VCC
O
PWR
I
ECL
GND
TTL
PROPB1ERR
N/C
Propagate B1 error (active high)
No connection (leave open)
System reset (active high)
Test input (tie to 0V)
Parallel output bus data A
Parallel output bus data A
Ground
SYSRST
SF
I
I
TTL
TTL
TTL
TTL
GND
TTL
TTL
GND
TTL
TTL
RXOUTA2
RXOUTA4
VCC
O
O
PWR
O
RXOUTA6
RXOUTB1
VCC
Parallel output bus data A
Parallel output bus data B
Ground
O
PWR
O
RXOUTB3
RXOUTB5
N/C
Parallel output bus data B
Parallel output bus data B
No connection (leave open)
No connection (leave open)
O
N/C
G52182-0, Rev. 4.0
1/5/00
VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Page 31
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