VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
1.25Gbits/sec
Gigabit Ethernet Transceiver
VSC7135
AC Characteristics
Figure 4:Transmit Timing Waveforms
REFCLK
T
T
2
1
T0:9
10 Bit Data
Data Valid
Data Valid
Data Valid
Table 1:Transmit AC Characteristics
Parameters
Description
Min
Max
Units
Conditions
Measured between thevalid
data level of T0:9 to the 1.4V
point of REFCLK
T0:9 Setup time to the rising
edge of REFCLK
1.5
—
ns.
T
T
1
T0:9 hold time after the
rising edge of REFCLK
1.0
—
—
ns.
ps.
2
20% to 80%, 75 Ohm load to
Vss, Tested on a sample basis
300
T
,T
TX+/TX- rise and fall time
SDR SDF
Latentcy from rising edge of
REFCLK to T0 appearing on
TX+/TX-
bc = Bit clocks
ns = Nano second
11bc - 1ns
ns.
T
LAT
Transmitter Output Jitter Allocation
IEEE 802.3Z Clause 38.68,
tested on a sample basis
T
—
—
192
80
ps.
ps.
Total data output jitter (p-p)
J
Serial data output
deterministic jitter (p-p)
IEEE 802.3Z Clause 38.69,
tested on a sample basis
T
DJ
G52146-0, Rev. 4.0
5/28/98
VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Page 5
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
