VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
1.25Gbits/sec
Gigabit Ethernet Transceiver
VSC7135
Figure 6: REFCLK Timing Waveforms
T
T
H
L
V
ih(min)
REFCLK
V
il(max)
Table 3: Reference Clock Requirements
Parameters
Description
Min
Max
Units
Conditions
Range over which both transmit
and receive reference clocks on any
link may be centered
123
127
MHz
FR
Frequency Range
Maximum frequency offset
between transmit and receive
reference clocks on one link
-200
200
ppm.
FO
DC
Frequency Offset
30
—
70
%
REFCLK duty cycle
REFCLK rise and fall time
REFCLK Jitter Power
5MHz
Measured at 1.5V
2.0
ns.
T
,T
Between V
and V
ih(min)
RCR RCF
il(max)
-12
dbc, RMS for 10 Bit Error Ratio
with zero length external path.
Tested on a sample basis
REFCLK
Jitter
—
40
ps.
PhaseNoise
∫
100Hz
G52146-0, Rev. 4.0
5/28/98
VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
Page 7
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