VSC6134
Datasheet
Table 459. Line Rx Interface Pins (continued)
Pin
B15
A15
A17
B17
Y2
Name
I/O Type
LIT
Description
RXDATA015_P
RXDATA015_N
RXCLK0_P
RXCLK0_N
LOS0
Data15 input for the line deserializer IF (single-edge
clocking). This is the MSB.
LIT
LIT
Clock input for the line deserializer IF (single-edge
clocking).
LIT
TI
Active high loss of signal indication from the line
deserializer physical layer device.
AA2
AA1
RXZEROERR0
RXONEERR0
TO
TO
Zero-error detection indication from the line side FEC
decoder.
One-error detection indication from the line side FEC
decoder.
5.1.3
Line Tx Interface Pins
The following table contains the descriptions for the line Tx interface pins. Note that bit 15 is MSB.
Table 460. Line Tx Interface Pins
Pin
Name
I/O Type
LO
Description
D17
E17
D19
E19
D21
E21
D23
E23
D25
E25
D27
E27
D29
E29
D31
E31
A19
B19
TXDATA000_P
TXDATA000_N
TXDATA001_P
TXDATA001_N
TXDATA002_P
TXDATA002_N
TXDATA003_P
TXDATA003_N
TXDATA004_P
TXDATA004_N
TXDATA005_P
TXDATA005_N
TXDATA006_P
TXDATA006_N
TXDATA007_P
TXDATA007_N
TXDATA008_P
TXDATA008_N
Data0 output for the line serializer IF (single-edge
clocking). This is the LSB.
LO
LO
Data1 output for the line serializer IF (single-edge
clocking).
LO
LO
Data2 output for the line serializer IF (single-edge
clocking).
LO
LO
Data3 output for the line serializer IF (single-edge
clocking).
LO
LO
Data4 output for the line serializer IF (single-edge
clocking).
LO
LO
Data5 output for the line serializer IF (single-edge
clocking).
LO
LO
Data6 output for the line serializer IF (single-edge
clocking).
LO
LO
Data7 output for the line serializer IF (single-edge
clocking).
LO
LO
Data8 output for the line serializer IF (single-edge
clocking).
LO
411 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
