VSC6134
Datasheet
Table 413. Global MPU Register 15 - Loss of Clock Interrupt Status (continued)
Reset
Value
Bit
Name
Access
Description
4
AL_LOCKL
R/W
Current condition for the add path line loss-of-clock
detector block (live bit).
0
0
0
0
0
3
2
1
0
AV_LOCKL
R/W
R/W
R/W
R/W
Current condition for the add path VCO loss-of-clock
detector block (live bit).
DV_LOCKL
Current condition for the drop path VCO
lloss-of-clock detector block (live bit).
APHASE_LOCKL
DPHASE_LOCKL
Interrupt live bit for the add path phase lock.
1: Indicates that the add path PFD is in phase lock.
Interrupt live bit for the drop path phase lock.
1: Indicates that the drop path PFD is in phase lock.
3.13.17 Global MPU Register 16 - Global Configuration Control 2
Address:
0x010
Register Reset Value:
0x0000
Table 414. Global MPU Register 16 - Global Configuration Control 2
Reset
Value
Bit
Name
Access
Description
15
OH_IDLE
R/W
0: During the RXODUD/RXOCHD idle cycles, zeros
are transmitted.
0
1: During the RXODUD/RXOCHD idle cycles, ones
are transmitted.
14:0
Reserved
RO
0x0000
376 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
