VSC6134
Datasheet
Table 207. DW Overhead Monitor Status Register 0 (continued)
Reset
Value
Bit
Name
Access
Description
12
GCC_RDYS
R/W
GCC0, GCC1, GCC2 status.
Switching GCC FIFO banks sets this bit.
0
0
0
0
0
1
11
10
9
OTU_AISS
GAISS
R/W
R/W
R/W
R/W
RO
OTU AIS status.
A change of status in detecting OTU AIS sets this bit.
Generic AIS status.
A change of status in detecting generic AIS sets this bit.
FPRBSSYNCS
FPRBSERRS
OOML
Framed PRBS sync status.
A change of status in detecting framed PRBS sets this bit.
8
Framed PRBS error status.
Detection of Framed PRBS bit errors sets this bit.
7
Out-of-multiframe alignment live.
1: Indicates an out-of-multiframe alignment condition.
0: Indicates an in-multiframe alignment condition.
6
5
LOML
RO
RO
Loss-of-multiframe alignment live.
1: Indicates loss-of-multiframe alignment.
1
0
APSPCCL
APS/PCC live.
1: Indicates the APS/PCC bytes are valid.
0: Indicates the APS/PCC bytes are invalid.
4
3
Reserved
RO
RO
0
0
OTU_AISL
OTU AIS live.
1: Indicates detection of OTU AIS.
2
1
0
GAISL
RO
RO
RO
Generic AIS live.
1: Indicates detection of generic AIS.
0
0
0
FPRBSSYNCL
Reserved
Framed PRBS sync live.
1: Indicates detection of framed PRBS.
283 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
