VSC6134
Datasheet
3.6.16
Add/Drop SM TTI Generator FIFO Access Register
This register provides access to a 32-word deep, 16-bit wide FIFO that holds the TTI values to be
inserted into the provisioned SM field. The FIFO has one configurable pointer for both read and write
operations shown in Table 171, page 265. Each time a read or write operation occurs at this address
(0x811 Add or 0x291 Drop), the pointer is automatically incremented by 1. The value of n is in the
range from 0 to 63 and each of the 32 registers in the FIFO contains two 8-bit values for TTI. The values
that reside in the FIFO’s 64 eight-bit fields are the values that are inserted into the outgoing TTI field on
a rotating basis. The 64-byte TTI signal is aligned with the OTU multiframe (MFAS). Byte 0 of the
64-byte TTI signal is present at OTU multiframe positions 00, 40, 80, C0 (hex).
Address:
0x811: Add Path
0x291: Drop Path
0x0000
Register Reset Value:
Table 169. Add/Drop SM TTI Generator FIFO Access Register
Reset
Value
Bit
Name
Access
Description
15:8
[ADD/DROP]_SM_TTI n
(n is odd)
R/W
The value at bits 15-8 of address 11111 of the FIFO
represents TTI 63.
0x00
7:0
[ADD/DROP]_SM_TTI n
(n is even)
R/W
The value of bits 7-0 of address 00000 of the FIFO
represents TTI 0.
0x00
3.6.17
Add/Drop PM TTI Generator FIFO Access Register
This register provides access to a 32-word deep, 16-bit wide FIFO that holds the TTI values to be
inserted into the provisioned TCM field. The FIFO has one configurable pointer for both read and write
operations shown in Table 171, page 265. Each time a read or write operation occurs at this address
(0x812 Add or 0x292 Drop), the pointer is automatically incremented by 1. The value n is in the range
from 0 to 63 and each of the 32 registers in the FIFO contains two 8-bit values for TTI. The values that
reside in the FIFO’s 64 eight-bit fields are the value that are inserted into the outgoing TTI field on a
rotating basis. The 64-byte TTI signal is aligned with the OTU multiframe (MFAS). Byte 0 of the
64-byte TTI signal is present at OTU multiframe positions 00, 40, 80, C0 (hex).
Address:
0x812: Add Path
0x292: Drop Path
0x0000
Register Reset Value:
Table 170. Add/Drop PM TTI Generator FIFO Access Register
Reset
Value
Bit
Name
Access
Description
15:8
[ADD/DROP]_PM_TTI n
(n is odd)
R/W
The value at bits 15-8 of address 11111 of the FIFO
represents TTI 63.
0x00
7:0
[ADD/DROP]_PM_TTI n
(n is even)
R/W
The value of bits 7-0 of address 00000 of the FIFO
represents TTI 0.
0x00
264 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
