欢迎访问ic37.com |
会员登录 免费注册
发布采购

VSC6134XST-01 参数 Datasheet PDF下载

VSC6134XST-01图片预览
型号: VSC6134XST-01
PDF下载: 下载PDF文件 查看货源
内容描述: [Micro Peripheral IC,]
分类和应用:
文件页数/大小: 438 页 / 4019 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
 浏览型号VSC6134XST-01的Datasheet PDF文件第261页浏览型号VSC6134XST-01的Datasheet PDF文件第262页浏览型号VSC6134XST-01的Datasheet PDF文件第263页浏览型号VSC6134XST-01的Datasheet PDF文件第264页浏览型号VSC6134XST-01的Datasheet PDF文件第266页浏览型号VSC6134XST-01的Datasheet PDF文件第267页浏览型号VSC6134XST-01的Datasheet PDF文件第268页浏览型号VSC6134XST-01的Datasheet PDF文件第269页  
VSC6134  
Datasheet  
3.6.18  
Add/Drop TTI Generator FIFO Pointer Register  
Address:  
0x813: Add Path  
0x293: Drop Path  
0x0000  
Register Reset Value:  
Table 171. Add/Drop TTI Generator FIFO Pointer Register  
Reset  
Value  
Bit  
Name  
Access  
Description  
15:11  
[ADD/DROP]_PM_TTI_PNT  
R/W  
This field is a pointer to the address of the FIFO that is  
accessible through register address 0x812 (add) or 0x292  
(drop) that holds the PM TTI values. This pointer is used for  
both read and write operations and is automatically  
incremented by 1 after any read or write operation.  
00000  
00000  
x00  
10:6  
[ADD/DROP]_SM_TTI_PNT  
R/W  
RO  
This field is a pointer to the address of the FIFO that is  
accessible through register address 0x811 (add) or 0x291  
(drop) that holds the SM TTI values. This pointer is used for  
both read and write operations and is automatically  
incremented by 1 after any read or write operation.  
5:0  
Reserved  
3.6.19  
Add/Drop PSI Generator FIFO Access Register  
This register provides access to a 128-word deep, 16-bit wide FIFO that holds the PSI values to be  
inserted into the provisioned PSI field. The FIFO has one configurable pointer for both read and write  
operations ([ADD/DROP]_PSI_GEN_PNT[6:0]) and each time a read or write operation occurs at this  
address, the pointer is automatically incremented by 1. The value n is in the range from 0 to 255 and  
each of the 128 registers in the FIFO contains two 8-bit values for PSI. The values that reside in the  
FIFO’s 256 eight-bit fields are the values that are inserted into the outgoing PSI field on a rotating basis.  
The 256-byte PSI signal is aligned with the OTU multiframe (MFAS). Byte 0 of the 255-byte PSI signal  
is present at OTU multiframe position 00.  
Address:  
0x814: Add Path  
0x294: Drop Path  
0x0000  
Register Reset Value:  
Table 172. Add/Drop PSI Generator FIFO Access Register  
Reset  
Value  
Bit  
Name  
Access  
Description  
15:8  
[ADD/DROP]_PSI_GEN n  
(n is odd)  
R/W  
The value at bits 15-8 of address 0x7F of the FIFO  
represents PSI 255.  
0x00  
7:0  
[ADD/DROP]_PSI_GEN n  
(n is even)  
R/W  
The value of bits 7-0 of address 0x00 of the FIFO  
represents PSI 0.  
0x00  
265 of 438  
VMDS-10185 Revision 4.0  
July 2006