VSC6134
Datasheet
3.6.12
Add/Drop Error Inject Enable and Error Type Register
Address:
0x80B: Add Path
0x28B: Drop Path
0x0000
Register Reset Value:
Table 165. Add/Drop Error Inject Enable and Error Type Register
Reset
Value
Bit
Name
Access
Description
15
ERROR_ENA
R/W
Active high. Error is injected whenever the Error Frequency
register is decremented downto 0. It is repeated as long as
this bit is high.
0
14:11
ERROR TYPE
R/W
‘0000’ - Inject 1 bit of error
‘0001’ - Inject 1 Byte of error
‘0010’ - Inject 2 Byte of error
‘0011’ - Inject 3 Byte of error
‘0100’ - Inject 4 Byte of error
‘0101’ - Inject 5 Byte of error
‘0110’ - Inject 6 Byte of error
‘0111’ - Inject 7 Byte of error
‘1000’ - Inject 8 Byte of error
Others Reserved
0000
All bits in errored byte are inverted and the bytes are
sequential.
10:0
Reserved
RO
0x000
3.6.13
Add/Drop FEC Enable/Disable Register
Address:
0x80C: Add Path
0x28C: Drop Path
0x0000
Register Reset Value:
Table 166. Add/Drop FEC Enable/Disable Register
Reset
Value
Bit
Name
Access
Description
15
OTUBIPERR_INSERT
R/W
0: Correct BIP-8 is transmitted.
1: BIP-8 is corrupted for test purposes. All BIP-8 bits are
inverted.
0
14
FEC_DISABLE
Reserved
R/W
RO
Active high. A 1 replaces all 16 RS encoder parity bytes
with zeros. This has no effect on the EFEC encoder.
0
13:0
0x0000
262 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
