VSC6134
Datasheet
3.6.8
Add/Drop Encoder ODU Overhead Source Controls
Address:
0x806: Add Path
0x286: Drop Path
0xE080
Register Reset Value:
Table 161. Add/Drop Encoder ODU Overhead Source Controls
Reset
Value
Bit
Name
Access
Description
15
[ADD/DROP]_TP_JB
R/W
Controls whether the OPU overhead justification control
and NJO bytes are sourced from the FPGA or from the
received data.
1
0: Bytes are sourced from the FPGA.
14
[ADD/DROP]_TP_GCC
R/W
0: All DW overhead GCC bytes are sourced according to
GCCG_CFG Table 28, page 94.
1
1: All DW overhead GCC bytes are sourced from the
incoming data.
13
[ADD/DROP]_TP_RES
[ADD/DROP]_OTU_TCM
R/W
R/W
0: RES, EXP and ACT bytes are sourced from the FPGA.
1: RES, EXP and ACT bytes are sourced from the incoming
data.
1
12:7
Bits [12:7] represent TCM fields 6 through 1. For each bit
that is set high, the corresponding TCM field has the data
inserted according to the [ADD/DROP]TCMCTRL bits in
Table 160, page 258. For each bit that is set low, the
corresponding TCM is sourced from the incoming data
(passed through).
0x01
6:0
Reserved
RO
0x00
3.6.9
Add/Drop Encoder OTU/Client Maintenance Signal Controls
Address:
0x807: Add Path
0x287: Drop Path
0x0000
Register Reset Value:
Table 162. Add/Drop Encoder OTU/Client Maintenance Signal Controls
Reset
Value
Bit
Name
Access
Description
15
[ADD/DROP]_GAIS_EN
R/W
1: Generic-AIS forced insertion when this bit is set high
regardless of other conditions
0
14
13
[ADD/DROP]_LOS_GAIS
[ADD/DROP]_LOF_GAIS
R/W
R/W
1: Generic-AIS inserted automatically when LOS detected
0
0
1: Generic-AIS inserted automatically when LOF detected
by [ADD/DROP] Frame Aligner
12
11
[ADD/DROP]_OTU_AIS_EN
[ADD/DROP]_ODU_AIS_EN
R/W
R/W
1: OTU-AIS forced insertion when this bit set high
regardless of other conditions
0
0
1: ODU-AIS forced insertion when this bit set high
regardless of other conditions
260 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
