VSC6134
Datasheet
Table 95. Add DW Overhead Processor/FEC Performance Monitor Registers (continued)
Address
0xF30
Register Name
Reference
DW Tandem Connection Monitor TTI FIFO Register
DW Tandem Connection Monitor Configuration Register
See Section 3.8.48, page 307.
See Section 3.8.49, page 307.
See Section 3.8.50, page 308.
0xF31
0xF32
DW Tandem Connection Monitor BIP-8 Bit Error Count
Register (MSW)
0xF33
0xF34
0xF35
DW Tandem Connection Monitor BIP-8 Bit Error Count
Register (LSW)
See Section 3.8.51, page 308.
See Section 3.8.52, page 309.
See Section 3.8.53, page 309.
DW Tandem Connection Monitor BIP-8 Block Error Count
Register (MSW)
DW Tandem Connection Monitor BIP-8 Block Error Count
Register (LSW)
0xF36
0xF37
0xF38
0xF39
0xF3A
0xF3B
0xF3C
0xF3D
0xF3E
0xF3F
0xF60
0xF61
0xF62
0xF63
0xF70
0xF71
0xF72
0xF73
0xF74
DW Tandem Connection Monitor BEI Count Register (MSW)
DW Tandem Connection Monitor BEI Count Register (LSW)
DW Path Monitor TTI FIFO Access Register
See Section 3.8.54, page 309.
See Section 3.8.55, page 310.
See Section 3.8.56, page 310.
See Section 3.8.57, page 311.
See Section 3.8.58, page 311.
See Section 3.8.59, page 311.
See Section 3.8.60, page 312.
See Section 3.8.61, page 312.
See Section 3.8.62, page 312.
See Section 3.8.63, page 313.
See Section 3.8.82, page 317.
See Section 3.8.83, page 318.
See Section 3.8.84, page 318.
See Section 3.8.85, page 318.
See Section 3.8.90, page 320.
See Section 3.8.91, page 321.
See Section 3.8.92, page 321.
See Section 3.8.93, page 321.
See Section 3.8.94, page 322.
DW Path Monitor Configuration Register
DW Path Monitor BIP-8 Bit Error Count Register (MSW)
DW Path Monitor BIP-8 Bit Error Count Register (LSW)
DW Path Monitor BIP-8 Block Error Count Register (MSW)
DW Path Monitor BIP-8 Block Error Count Register (LSW)
DW Path Monitor BEI Count Register (MSW)
DW Path Monitor BEI Count Register (LSW)
Standard FEC Corrected One Bit Error Count (LSW)
Standard FEC Corrected One Bit Error Count (MSW)
Standard FEC Corrected Zero Bit Error Count (LSW)
Standard FEC Corrected Zero Bit Error Count (MSW)
DW PSI Monitor Configuration Register
DW PSI FIFO Access Register
Framed PRBS Error Count Register (MSW)
Framed PRBS Error Count Register (LSW)
Framed PRBS Configuration Register
224 of 438
VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
