VSC6134
Datasheet
Table 92. Add FEC Frame Aligner Registers
Address
0xD08
0xD09
0xD0A
0xD0B
0xD0C
Register Name
Reference
FEC Frame Aligner Configuration 0
FEC Frame Aligner Configuration 1
FEC Frame Aligner Configuration 2
FEC Frame Aligner Configuration 3
FEC Frame Aligner Status
See Section 3.10.6, page 355.
See Section 3.10.7, page 355.
See Section 3.10.8, page 356.
See Section 3.10.9, page 356.
See Section 3.10.10, page 357.
Table 93. Add Line Overhead Monitor Registers
Address
Register Name
Reference
0xD80-
0xDEB
LOHM DCC Message Registers
See Section 3.2.1, page 226.
0xDEC
0xDED
0xDEF
0xDF0
0xDF1
0xDF2
0xDF3
0xDF4
0xDF5
0xDF6
0xDF7
0xDF8
LOHM Configuration
See Section 3.2.2, page 226.
See Section 3.2.3, page 227.
See Section 3.2.4, page 229.
See Section 3.2.5, page 230.
See Section 3.2.6, page 230.
See Section 3.2.7, page 230.
See Section 3.2.8, page 231.
See Section 3.2.9, page 231.
See Section 3.2.10, page 231.
See Section 3.2.11, page 232.
See Section 3.2.12, page 232.
See Section 3.2.13, page 232.
LOHM Interrupt Mask
LOHM Interrupt Status
LOHM BIP-8 Bit Error Counter (MSW)
LOHM BIP-8 Bit Error Counter (LSW)
LOHM BIP-8 Bit Error Counter (MSW)
LOHM BIP-8 Bit Error Counter (LSW)
LOHM K1 and K2 Byte Validated
LOHM S1 Byte Validated
LOHM M1 Byte Counter (MSW)
LOHM M1 Byte Counter (LSW)
LOHM E2 Byte Orderwire
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VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
