VSC6134
Datasheet
2.15.6
FEC Bridge with On-Chip SONET Regeneration Modes
There are two SONET Regeneration FEC Bridge modes:
●
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StFEC(S) <-SONET(Regen)-> LFEC(S), 1/1
StFEC(NS) <-SONET(Regen)-> LFEC(NS), 1/1
The following figure shows the FEC bridge or regenerator with on-chip SONET regeneration. In the add
direction, the StFEC signal is framed, decoded, and optionally corrected; DWOH performance
monitoring is performed; and the DWOH is terminated (DWOH cannot be passed through). The
synchronously mapped SONET signal is monitored and regenerated. New DWOH is then inserted, and
the LFEC parity bytes are recalculated and added. In the drop direction, the LFEC signal is framed,
decoded, and optionally corrected; DWOH performance monitoring is performed; and the DWOH is
terminated (DWOH cannot be passed through). The synchronously mapped SONET payload is
monitored and regenerated, new DWOH is then inserted, and the StFEC parity bytes are recalculated
and added.
System and line side rates are the same. The StFEC(S) to LFEC(S) mode supports the optional
extraction of the OTU stuff bytes received in the add and drop directions and the insertion of the OTU
stuff bytes transmitted in the add and drop directions.
Figure 40. StFEC to LFEC Bridge with SONET Regeneration Mode
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VMDS-10185 Revision 4.0
July 2006
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
