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VSC6134XST-01 参数 Datasheet PDF下载

VSC6134XST-01图片预览
型号: VSC6134XST-01
PDF下载: 下载PDF文件 查看货源
内容描述: [Micro Peripheral IC,]
分类和应用:
文件页数/大小: 438 页 / 4019 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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VSC6134  
Datasheet  
2.15.4  
FEC Bridge Modes  
There are two FEC Bridge modes:  
StFEC(S) <-DWOH (without payload processing) to LFEC(S), 1/1  
StFEC(NS) <-DWOH (without payload processing) to LFEC(NS), 1/1  
The following figure shows the FEC Bridge or Regenerator mode with on-chip DWOH processing and  
without payload processing. In the add direction, the StFEC signal is framed, decoded, and optionally  
corrected; DWOH performance monitoring is performed; and the DWOH is terminated or passed  
through. New DWOH is then inserted as required, and the LFEC parity bytes are recalculated and  
added. In the drop direction, the LFEC signal is framed, decoded, and optionally corrected; DWOH  
performance monitoring is performed; and the DWOH is terminated or passed through. New DWOH is  
then inserted as required, and the StFEC parity bytes are recalculated and added. The StFEC(S) to  
LFEC(S) mode supports the optional extraction of the OTU stuff bytes received in the add and drop  
directions and the insertion of the OTU stuff bytes transmitted in the add and drop directions.  
Figure 38. StFEC to LFEC Bridge Without Payload Processing Mode  
155 of 438  
VMDS-10185 Revision 4.0  
July 2006