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DG538ADN 参数 Datasheet PDF下载

DG538ADN图片预览
型号: DG538ADN
PDF下载: 下载PDF文件 查看货源
内容描述: 4- / 8通道宽带视频多路复用器 [4-/8-Channel Wideband Video Multiplexers]
分类和应用: 复用器
文件页数/大小: 16 页 / 143 K
品牌: VISHAY [ VISHAY ]
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DG534A/538A  
Vishay Siliconix  
APPLICATIONS (CONT'D)  
Power Supplies and Decoupling  
a. Use extensive ground planes on double sided PCB  
separating adjacent signal paths. Multilayer PCB is even  
better.  
A useful feature of the DG534A/538A is its power supply  
flexibility. It can be operated from unipolar supplies (V–  
connected to 0 V) if required. Allowable operating voltage  
ranges are shown in Figure 13.  
b. Keep signal paths as short as practically possible with all  
channel paths of near equal length.  
c. Use strip-line layout techniques.  
Note that the analog signal must not go below Vby more than  
0.3 V (see absolute maximum ratings). However, the addition  
of a Vpin has a number of advantages:  
Improvements in performance can be obtained by using PLCC  
parts instead of DIPs. The stray effects of the quad PLCC  
package are lower than those of the dual-in-line packages.  
Sockets for the PLCC packages usually increase crosstalk.  
a. It allows flexibility in analog signal handling, i.e. with V=  
5 V and V+ = 15 V, up to "5 V ac signals can be  
accepted.  
+5 V  
51 W  
+15 V  
b. The value of on capacitance (CS(on)) may be reduced by  
increasing the reverse bias across the internal FET body to  
51 ꢀ  
source junction. V+ has no effect on CS(on)  
.
+
+
It is useful to note that tests indicate that optimum video  
differential phase and gain occur when Vis 3 V.  
C
2
C
C
1
C
2
1
c. Veliminates the need to bias an ac analog signal using  
V
L
V+  
S
A1  
D
A
potential dividers and large decoupling capacitors.  
S
S
A2  
It is established rf design practice to incorporate sufficient  
bypass capacitors in the circuit to decouple the power supplies  
to all active devices in the circuit. The dynamic performance  
of the DG534/538 is adversely affected by poor decoupling of  
power supply pins. Also, since the substrate of the device is  
connected to the negative supply, proper decoupling of this pin  
is essential.  
D
B
DG534A  
B1  
S
B2  
GND V–  
C
1
C
2
+
Rules:  
51 ꢀ  
a. Decoupling capacitors should be incorporated on all  
power supply pins (V+, V, VL).  
C
1
C
2
= 1 F Tantalum  
= 100 nF Polyester  
b. They should be mounted as close as possible to the  
device pins.  
3 V  
c. Capacitors should have good frequency characteristics -  
tantalum bead and/or ceramic disc types are suitable.  
Recommended decoupling capacitors are 1- to 10-F  
tantalum bead, in parallel with 100-nF ceramic or  
polyester.  
FIGURE 14. DG534A Power Supply Decoupling  
Interfacing  
d. Additional high frequency protection may be provided by  
51-carbon film resistors connected in series with the  
power supply pins (see Figure 14).  
Logic interfacing is easily accomplished. Comprehensive  
addressing and control functions are incorporated in the  
design.  
Board Layout  
The VL pin permits interface to various logic types. The device  
is primarily designed to be TTL or CMOS logic compatible with  
+5 V applied to VL. The actual logic threshold can be raised  
simply by increasing VL.  
PCB layout rules for good high frequency performance must  
also be observed to achieve the performance boasted by the  
DG534A/538A. Some tips for minimizing stray effects are:  
Document Number: 70069  
S-05734Rev. G, 29-Jan-02  
www.vishay.com  
15