TMC8462 Datasheet • Document Revision V1.4 • 2018-May -09
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6.4.16 Distributed Clocks Time Loop Control Unit
Time Loop Control unit is usually assigned to ECAT. Write access to Time Loop Control registers by PDI
(and not ECAT) depends on explicit hardware configuration and on the used ESC type. Check the device
features for availability.
6.4.16.1 System Time (0x0910:0x0917)
Bit
Description
ECAT
PDI
Reset Value
0:63
ECAT read access: Local copy of System Time
when frame passed the reference clock (i.e.,
including System Time Delay). Time latched at
beginning of the frame (Ethernet SOF delimiter)
r
-
63:0
31:0
PDI read access: Local copy of the System Time.
Time latched when reading first byte (0x0910)
-
r
Write access: Written value will be compared (w)
with the local copy of the System time. The (spe-
result is an input to the time control loop.
r/-
cial
NOTE: written value will be compared at the func-
end of the frame with the latched (SOF) local tion)
copy of the System time if at least the first byte
(0x0910) was written.
31:0
Write access: Written value will be compared
with Latch0 Time Positive Edge time. The result
is an input to the time control loop.
-
(w)
(spe-
cial
NOTE: written value will be compared at the
end of the access with Latch0 Time Positive
Edge (0x09B0:0x09B3) if at least the last byte
(0x0913) was written.
func-
tion)
Table 90: Register 0x0910:0x0917 (System Time)
Note
Write access to this register depends upon ESC configuration (typically ECAT, PDI
only with explicit ESC configuration: System Time PDI controlled).
6.4.16.2 Receive Time ECAT Processing Unit (0x0918:0x091F)
Bit
Description
ECAT
PDI
Reset Value
63:0
Local time of the beginning of a frame (start r/-
first bit of preamble) received at the ECAT Pro-
cessing Unit containing a write access to Regis-
ter 0x0900
r/-
NOTE: E.g., if port 0 is open, this register reflects
the Receive Time Port 0 as a 64 Bit value.
Table 91: Register 0x0918:0x091F (Rcv Time EPU)
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