TMC8462 Datasheet • Document Revision V1.4 • 2018-May -09
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6.4.16.8 System Time Difference Filter Depth (0x0934)
Bit
Description
ECAT
PDI
Reset Value
3:0
Filter depth for averaging the received System r/(w)
Time deviation.
r/(w)
A write access resets System Time Difference
(0x092C:0x092F)
7:4
Reserved, write 0
r/-
r/-
Table 97: Register 0x0934 (Sys Time Diff Filter)
Note
Write access to this register depends upon ESC configuration (typically ECAT, PDI
only with explicit ESC configuration: System Time PDI controlled).
6.4.16.9 Speed Counter Filter Depth (0x0935)
Bit
Description
ECAT
PDI
Reset Value
3:0
Filter depth for averaging the clock period devi- r/(w)
ation. A write access resets the internal speed
counter filter.
r/(w)
7:4
Reserved, write 0
r/-
r/-
Table 98: Register 0x0935 (Speed Cnt Filter Depth)
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