TMC8462 Datasheet • Document Revision V1.4 • 2018-May -09
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Bit #
9
Signal
Bit #
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
Signal
MFCO09 polarity
MFCO10 polarity
MFCO11 polarity
MFCO12 polarity
MFCO13 polarity
MFCO14 polarity
MFCO15 polarity
MFCO16 polarity
MFCO17 polarity
MFCO18 polarity
MFCO19 polarity
MFCO20 polarity
MFCO21 polarity
MFCO22 polarity
MFCO23 polarity
unused/reserved
unused/reserved
unused/reserved
unused/reserved
unused/reserved
unused/reserved
unused/reserved
unused/reserved
MFCO09 mask
MFCO10 mask
MFCO11 mask
MFCO12 mask
MFCO13 mask
MFCO14 mask
MFCO15 mask
MFCO16 mask
MFCO17 mask
MFCO18 mask
MFCO19 mask
MFCO20 mask
MFCO21 mask
MFCO22 mask
MFCO23 mask
unused/reserved
unused/reserved
unused/reserved
unused/reserved
unused/reserved
unused/reserved
unused/reserved
unused/reserved
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Table 207: MFC IO watchdog WD_OUT_MASK_POL signal/port assignment
Watchdog Input Port Configuration The following table contains the assignments of ports/signals to
the configuration bits in the WD_IN_MASK_POL register. An MFCIOxx pin programmed as input is called
MFCIxx.
Bit #
Signal
Bit #
32
Signal
0
1
2
3
4
MFCI00 polarity
MFCI01 polarity
MFCI02 polarity
MFCI03 polarity
MFCI04 polarity
MFCI00 mask
MFCI01 mask
MFCI02 mask
MFCI03 mask
MFCI04 mask
33
34
35
36
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