TMC4330A Datasheet | Document Revision 1.01 • 2017-JAN-12
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3. SPI Interfacing
TMC4330A uses 40-bit SPI datagrams for communication with a microcontroller. The bit-serial
interface is synchronous to a bus clock. For every bit sent from the bus master to the bus slave,
another bit is sent simultaneously from the slave to the master. In the following chapter
information is provided about the SPI control interface, SPI datagram structure and SPI
transaction process.
SPI Input Control Interface Pins
Pin Name
NSCSIN
SCKIN
Type
Input
Input
Input
Output
Remarks
Chip Select of SPI-µC interface (low active)
Serial clock of SPI-µC interface
Serial data input of SPI-µC interface
Serial data output of SPI-µC interface
SDIIN
SDOIN
Table 3: SPI Input Control Interface Pins
Microcontrollers that are equipped with hardware SPI are typically able to
communicate using integer multiples of 8 bit.
The NSCSIN line of the TMC4330A has to stay active (low) for the complete
duration of the datagram transmission.
Each datagram that is sent to TMC4330A is composed of an address byte
followed by four data bytes. This allows direct 32-bit data word communication
with the register set of TMC4330A. Each register is accessed via 32 data bits;
even if it uses less than 32 data bits.
SPI Datagram
Structure
i
Each register is specified by a one-byte address:
For read access the most significant bit of the address byte is 0.
For write access the most significant bit of the address byte is 1.
NOTE:
Some registers are write only registers. Most registers can be read also; and there
are also some read only registers.
TMC4330A SPI Datagram Structure
MSB (transmitted first)
40 bits
...
LSB (transmitted last)
0
39
8-bit address
8-bit SPI status
39 ... 32
32-bit data
31 ... 0
to TMC4330A:
RW + 7-bit address
from TMC4330A:
8-bit SPI status
39 / 38 ... 32
8-bit data
8-bit data
23 ... 16
8-bit data
15 ... 8
8-bit data
7 ... 0
31 ... 24
31...28 27...24
W
38...32
23...20
19...16
15...12
11...8
7...4
3...0
2 1 0
39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
Figure 11: TMC4330A SPI Datagram Structure
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