TVP5160
www.ti.com
SLES135E–FEBRUARY 2005–REVISED APRIL 2011
Table 3-79. Back-End AGC Control
Subaddress 6Ch
Default
08h
7
6
5
4
3
1
2
1
0
Reserved
Peak
Color
Sync
This register allows disabling the back-end AGC when the front-end AGC uses specific amplitude references (sync height, color burst, or
composite peak) to decrement the front-end gain. For example, writing 0x09 to this register disables the back-end AGC whenever the
front-end AGC uses the sync height to decrement the front-end gain.
Sync: Disables back end AGC when the front end AGC uses the sync height as an amplitude reference.
0 = Enabled (default)
1 = Disabled
Color: Disables back end AGC when the front end AGC uses the color burst as an amplitude reference.
0 = Enabled (default)
1 = Disabled
Peak: Disables back end AGC when the front end AGC uses the composite peak as an amplitude reference.
0 = Enabled (default)
1 = Disabled
Table 3-80. AGC Decrement Speed
Subaddress 6Fh
Default
04h
7
6
5
4
3
2
1
0
Reserved
AGC decrement speed [2:0]
AGC decrement speed: Adjusts gain decrement speed. Only used for composite/luma peaks.
111 = 7 (slowest)
110 = 6 (default)
⋮
000 = 0 (fastest)
Table 3-81. ROM Version
Subaddress 70h
Read only
7
6
5
4
3
2
1
0
ROM version [7:0]
ROM Version [7:0]: ROM revision number
Table 3-82. RAM Version MSB
Subaddress 71h
Read only
7
6
5
4
3
2
1
0
RAM version MSB [7:0]
RAM version MSB [7:0]: This register identifies the MSB of the RAM code revision number.
Copyright © 2005–2011, Texas Instruments Incorporated
Submit Documentation Feedback
focus.ti.com: TVP5160
Internal Control Registers
71
TI [ TEXAS INSTRUMENTS ]
