TVP5160
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SLES135E–FEBRUARY 2005–REVISED APRIL 2011
Table 3-85. AGC Increment Speed
Subaddress 78h
Default
06h
7
6
5
4
3
2
1
0
Reserved
AGC increment speed [2:0]
AGC increment speed: Adjusts gain increment speed.
111 = 7 (slowest)
110 = 6 (default)
⋮
000 = 0 (fastest)
Table 3-86. AGC Increment Delay
Subaddress 79h
Default
1Eh
7
6
5
4
3
2
1
0
AGC increment delay [7:0]
AGC increment delay: Number of frames to delay gain increments
1111 1111 = 255
⋮
0001 1110 = 30 (default)
⋮
0000 0000 = 0
Table 3-87. Analog Output Control 1
Subaddress 7Fh
Default 00h
7
6
5
4
3
2
1
0
Reserved
AGC enable
Reserved
Analog output
enable
AGC enable:
0 = Enabled (default)
1 = Disabled, manual gain mode set (see Section 4.2.10)
Analog output enable:
0 = Analog output is disabled (default)
1 = Analog output is enabled
Table 3-88. Chip ID MSB
Subaddress 80h
Read only
7
6
5
4
3
2
1
0
CHIP ID MSB[7:0]
CHIP ID MSB[7:0]: This register identifies the MSB of device ID. Value = 51h
Table 3-89. Chip ID LSB
Subaddress 81h
Read only
7
6
5
4
3
2
1
0
CHIP ID LSB [7:0]
CHIP ID LSB [7:0]: This register identifies the LSB of device ID. Value = 60h
Copyright © 2005–2011, Texas Instruments Incorporated
Internal Control Registers
73
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