TVP5160
www.ti.com
SLES135E–FEBRUARY 2005–REVISED APRIL 2011
3-84
3-85
3-86
3-87
3-88
3-89
3-90
3-91
3-92
3-93
3-94
3-95
3-96
3-97
3-98
3-99
F-Bit and V-Bit Control .......................................................................................................... 72
AGC Increment Speed .......................................................................................................... 73
AGC Increment Delay ........................................................................................................... 73
Analog Output Control 1 ........................................................................................................ 73
Chip ID MSB ..................................................................................................................... 73
Chip ID LSB ...................................................................................................................... 73
RAM Version LSB ............................................................................................................... 74
Color PLL Speed Control ....................................................................................................... 74
3DYC Luma Coring LSB ........................................................................................................ 74
3DYC Chroma Coring LSB ..................................................................................................... 74
3DYC Luma/Chroma Coring MSB ............................................................................................ 74
3DYC Luma Gain ................................................................................................................ 75
3DYC Chroma Gain ............................................................................................................. 75
3DYC Signal Quality Gain ...................................................................................................... 75
3DYC Signal Quality Coring .................................................................................................... 75
IF Compensation Control ....................................................................................................... 76
3-100 IF Differential Gain Control ..................................................................................................... 76
3-101 IF Low Frequency Gain Control ............................................................................................... 76
3-102 IF High Frequency Gain Control ............................................................................................... 76
3-103 Weak Signal High Threshold ................................................................................................... 76
3-104 Weak Signal High Threshold ................................................................................................... 77
3-105 Status Request .................................................................................................................. 77
3-106 3DYC NTSC VCR Threshold .................................................................................................. 77
3-107 3DYC PAL VCR Threshold ..................................................................................................... 77
3-108 Vertical Line Count .............................................................................................................. 77
3-109 AGC Decrement Delay ......................................................................................................... 78
3-110 VDP TTX Filter and Mask ...................................................................................................... 78
3-111 VDP TTX Filter Control ......................................................................................................... 79
3-112 VDP FIFO Word Count ......................................................................................................... 80
3-113 VDP FIFO Interrupt Threshold ................................................................................................. 81
3-114 VDP FIFO Reset ................................................................................................................. 81
3-115 VDP FIFO Output Control ...................................................................................................... 81
3-116 VDP Line Number Interrupt .................................................................................................... 81
3-117 VDP Pixel Alignment ............................................................................................................ 82
3-118 VDP Line Start ................................................................................................................... 82
3-119 VDP Line Stop ................................................................................................................... 82
3-120 VDP Global Line Mode ......................................................................................................... 82
3-121 VDP Full Field Enable .......................................................................................................... 82
3-122 VDP Full Field Mode ............................................................................................................ 83
3-123 Interlaced/Progressive Status .................................................................................................. 83
3-124 VBUS Data Access with No VBUS Address Increment .................................................................... 83
3-125 VBUS Data Access with VBUS Address Increment ........................................................................ 83
3-126 VDP FIFO Read Data ........................................................................................................... 83
3-127 VBUS Address ................................................................................................................... 84
3-128 Interrupt Raw Status 0 .......................................................................................................... 84
3-129 Interrupt Raw Status 1 .......................................................................................................... 85
3-130 Interrupt Status 0 ................................................................................................................ 85
3-131 Interrupt Status 1 ................................................................................................................ 86
Copyright © 2005–2011, Texas Instruments Incorporated
List of Tables
7