TVP5160
SLES135E–FEBRUARY 2005–REVISED APRIL 2011
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3-132 Interrupt Mask 0 ................................................................................................................. 86
3-133 Interrupt Mask 1 ................................................................................................................. 86
3-134 Interrupt Clear 0 ................................................................................................................. 87
3-135 Interrupt Clear 1 ................................................................................................................. 87
3-136 VDP Closed Caption Data ...................................................................................................... 88
3-137 VDP WSS/CGMS Data ......................................................................................................... 88
3-138 VDP VITC Data .................................................................................................................. 89
3-139 VDP V-Chip TV Rating Block 1 ................................................................................................ 89
3-140 VDP V-Chip TV Rating Block 2 ................................................................................................ 89
3-141 VDP V-Chip TV Rating Block 3 ................................................................................................ 90
3-142 VDP V-Chip MPAA Rating Data ............................................................................................... 90
3-143 VDP General Line Mode and Line Address .................................................................................. 91
3-144 VDP VPS, Gemstar EPG Data ................................................................................................ 92
3-145 Analog Output Control 2 ........................................................................................................ 93
3-146 Interrupt Configuration .......................................................................................................... 93
3-147 Interrupt Raw Status 1 .......................................................................................................... 93
3-148 Interrupt Status 1 ................................................................................................................ 94
3-149 Interrupt Mask 1 ................................................................................................................. 94
3-150 Interrupt Clear 1 ................................................................................................................. 94
6-1
Memories Tested ............................................................................................................... 103
Revision History................................................................................................................. 106
8-1
8
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