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TVP5160PNP 参数 Datasheet PDF下载

TVP5160PNP图片预览
型号: TVP5160PNP
PDF下载: 下载PDF文件 查看货源
内容描述: NTSC / PAL / SECAM /组件2×10位数字视频解码器 [NTSC/PAL/SECAM/Component 2x10-Bit Digital Video Decoder]
分类和应用: 解码器
文件页数/大小: 111 页 / 1417 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TVP5160  
SLES135EFEBRUARY 2005REVISED APRIL 2011  
www.ti.com  
3
Internal Control Registers  
The TVP5160 decoder is initialized and controlled by a set of internal registers that define the operating  
parameters of the entire device. Communication between the external controller and the TVP5160  
decoder is through a standard I2C host port interface, as described earlier.  
Table 3-1 shows the summary of these registers. Detailed programming information for each register is  
described in the following sections. Additional registers are accessible through an indirect procedure  
involving access to an internal 24-bit address wide VBUS. Table 3-2 shows the summary of VBUS  
registers.  
Table 3-1. I2C Registers Summary  
REGISTER NAME  
I2C SUBADDRESS  
00h  
DEFAULT  
00h  
R/W(1)  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
Input/Output Select  
AFE Gain Control  
Video Standard Select  
Operation Mode  
Autoswitch Mask  
Color Killer  
01h  
0Fh  
00h  
02h  
03h  
00h  
04h  
23h  
05h  
10h  
Luminance Processing Control 1  
Luminance Processing Control 2  
Luminance Processing Control 3  
Luminance Brightness  
Luminance Contrast  
Chrominance Saturation  
Chroma Hue  
06h  
00h  
07h  
00h  
08h  
00h  
09h  
80h  
0Ah  
80h  
0Bh  
80h  
0Ch  
00h  
Chrominance Processing Control 1  
Chrominance Processing Control 2  
Reserved(2)  
0Dh  
00h  
0Eh  
0Ch  
0Fh  
Pr Contrast  
10h  
80h  
80h  
80h  
R/W  
R/W  
R/W  
Y Contrast  
11h  
Pb Contrast  
12h  
Reserved(2)  
13h  
G/Y Brightness  
14h  
80h  
R/W  
Reserved(2)  
15h  
AVID Start Pixel  
16h17h  
18h19h  
1Ah1Bh  
1Ch1Dh  
1Eh1Fh  
20h21h  
22h23h  
24h25h  
26h  
55h/5Fh  
325h/32Fh  
00h/07h  
40h/47h  
004h/001h  
007h/004h  
001h/26Fh  
015h/018h  
00h  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
AVID Stop Pixel  
HS Start Pixel  
HS Stop Pixel  
VS Start Line  
VS Stop Line  
VBLK Start Line  
VBLK Stop Line  
Embedded Sync Offset Control 1  
Embedded Sync Offset Control 2  
Fast Switch Control  
Fast Switch Overlay Delay  
Fast Switch SCART Delay  
Overlay Delay  
27h  
00h  
28h  
C0h  
29h  
17h  
2Ah  
1Ch  
2Bh  
12h  
(1) R = Read only, W = Write only, R/W = Read and write  
(2) Reserved I2C register addresses must not be written to.  
38  
Internal Control Registers  
Copyright © 20052011, Texas Instruments Incorporated  
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