TSC2007-Q1
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SBAS545 –SEPTEMBER 2011
DIGITAL INTERFACE
ADDRESS BYTE
The TSC2007-Q1 has a 7-bit slave address word. The first five bits (MSBs) of the slave address are
factory-preset to comply with the I2C standard for A/D converters and are always set at '10010'. The logic state of
the address input pins (A1-A0) determines the two LSBs of the device address to activate communication.
Therefore, a maximum of four devices with the same preset code can be connected on the same bus at one
time.
The A1-A0 address inputs are read whenever an address byte is received, and should be connected to the
supply pin (VDD/REF) or the ground pin (GND). The slave address is latched into the TSC2007-Q1 on the falling
edge of SCL after the read/write bit has been received by the slave.
The last bit of the address byte (R/W) defines the operation to be performed. When set to a '1', a read operation
is selected; when set to a ‘0’, a write operation is selected. Following the START condition, the TSC2007-Q1
monitors the SDA bus, checking the device type identifier being transmitted. Upon receiving the '10010' code, the
appropriate device select bits, and the R/W bit, the slave device outputs an acknowledge signal on the SDA line.
Table 1. I2C Slave Address Byte
MSB
D7
LSB
D0
D6
D5
D4
D3
D2
D1
1
0
0
1
0
A1
A0
R/W
Bit D0: R/W
1: I2C master read from TSC (I2C read addressing).
0: I2C master write to TSC (I2C write addressing).
COMMAND BYTE
Table 2. Command Byte Definition (Excluding the Setup Command)(1)
BIT
NAME
DESCRIPTION
D7-D4
C3-C0
All Converter Function Select bits as detailed in Table 3, except for the setup command ('1011').
00: Power down between cycles. PENIRQ enabled.
01: A/D converter on. PENIRQ disabled.
10: A/D converter off. PENIRQ enabled.
11: A/D converter on. PENIRQ disabled.
D3-D2
PD1-PD0
0: 12-bit (Lower speed referred to as the 2MHz clock).
1: 8-bit (Higher speed referred to as the 4MHz clock).
D1
D0
M
X
Don't care.
(1) The command byte definition for the setup command is shown in Table 4.
Bits D7-D4: C3-C0—Converter function select bits. These bits select the input to be converted and the converter
function to be executed, activate the drivers, and configure the PENIRQ pull-up resistor (RIRQ). Table 3 lists the
possible converter functions.
Bits D3-D2: PD1-PD0—Power-down bits. These two bits select the power-down mode that the TSC2007-Q1 will
be in after the current command completes, as shown in Table 2.
It is recommended to set PD0 = 0 in each command byte to get the lowest power consumption possible. If
multiple X-, Y-, and Z-position measurements will be done one right after another (such as when averaging), PD0
=1 will leave the touch screen drivers on at the end of each conversion cycle.
Bit D1: M—Mode bit. If M = 0, the TSC2007-Q1 is in 12-bit mode. If M = 1, 8-bit mode is selected.
Bit D0: X—Don’t care.
Copyright © 2011, Texas Instruments Incorporated
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