TPS929160-Q1
ZHCSNG0 – APRIL 2023
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When the junction temperature, T(J), of TPS929160-Q1 rises above pre-thermal warning threshold, the device
reports pre-thermal warning, pull ERR pin with pulsed current sink for 50 µs and sets the flag registers including
FLAG_PRETSD and FLAG_ERR to 1.
The fault is latched in flag registers. When the junction temperature of TPS929160-Q1 falls below pre-thermal
warning threshold, the master controller must write 1 to CLRFAULT register to clear FLAG_PRETSD and
FLAG_ERR. The CLRFAULT bit automatically returns to 0.
When more accurate thermal measurement on LED unit is required, one current output channel can be
sacrificed to provide current bias to external thermal resistor such as PTC or NTC. The voltage of external
thermal resistor can be measured by integrated ADC to acquire the temperature information of thermal resistor
located area. The master controller can determine actions based on the acquired temperature information to turn
off or reduce current output.
7.3.7.6 Overtemperature Protection in NORMAL state
The TPS929160-Q1 has overtemperature protection at T(TSD1), typical 175°C.
When device junction temperature T(J) further rises above overtemperature protection threshold, the device turns
off all output drivers, pulls the ERR pin low with constant current sink to report fault, and sets the flag registers
including FLAG_TSD and FLAG_ERR to 1.
The fault is latched in flag registers. When the junction temperature falls below T(TSD1) – T(TSD1_HYS), the device
resumes all outputs and releases ERR pin pulldown. The master controller must write 1 to CLRFAULT to clear
FLAG_TSD and FLAG_ERR. The CLRFAULT bit automatically returns to 0.
7.3.7.7 Overtemperature Shutdown in NORMAL state
When the T(J) rises too high above T(TSD2), 180°C typically, the TPS929160-Q1 turns off the internal linear
regulator, VLDO output to shutdown all the analog and digital circuit. The ERR pin is pulled down by constant
current sink to report the fault, and the FLAG_POR and FLAG_ERR are all set to 1.
When the T(J) drops below T(TSD2) – T(TSD2_HYS), the TPS929160-Q1 restarts from POR state with all the
registers cleared to default value and ERR pin released. The master controller must write 1 to CLRPOR to clear
both FLAG_POR and FLAG_ERR after fault removal. The CLRPOR bit automatically returns to 0.
7.3.7.8 LED Open-Circuit Diagnostics in NORMAL state
The TPS929160-Q1 integrates LED open-circuit diagnostics to allow users to monitor LED status real time. The
device monitors voltage difference between SUPPLY and OUTXn to judge if there is any open-circuit failure. The
SUPPLY voltage is also monitored in parallel with programmable threshold to determine if supply voltage is high
enough for open-circuit diagnostics.
The open-circuit monitor is only effective during PWM-ON state with programmable minimal pulse width greater
than t(BLANK) + t(OPEN_deg). The t(BLANK) is programmed by register BLANK. If PWM on-time is less than t(BLANK)
+
t(OPEN_deg), the device does not report any open-circuit fault. When the device supply voltage V(SUPPLY) is below
the threshold V(LOWSUPTH) set by register LOWSUPTH, the LED open-circuit is not detected nor reported.
When the voltage difference V(SUPPLY) – V(OUTXn) is below threshold V(OPEN_th_rising) with duration longer than
t(BLANK) + t(OPEN_deg), and the device supply voltage V(SUPPLY) is above the threshold V(LOWSUPTH) set by register
LOWSUPTH, the TPS929160-Q1 pulls the ERR pin down with one pulsed current sink for 50 µs to report fault
and set flag registers including FLAG_OPENOUTXn, FLAG_OUT and FLAG_ERR to 1. In NORMAL state, the
device does not take any actions in response the LED open-circuit fault and waits for the master controller to
determine the protection behavior.
The fault is latched in flag registers. When the voltage difference V(SUPPLY) – V(OUTXn) rises above threshold
V(OPEN_th_rising) with duration longer than t(BLANK) + t(OPEN_deg), or the device supply voltage V(SUPPLY) is below
the threshold V(LOWSUPTH), the master controller must write 1 to CLRFAULT to clear FLAG_OPENOUTXn,
FLAG_OUT and FLAG_ERR. The CLRFAULT bit automatically returns to 0.
Copyright © 2023 Texas Instruments Incorporated
English Data Sheet: SLVSG60
30
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