TPS61199
www.ti.com
SLVSAN3 –DECEMBER 2010
DETAILED DESCRIPTION
See the functional block diagram and Figure 1 for each section.
Supply Voltage
The TPS61199 has a built-in linear regulator to supply the IC analog and logic circuitry. The VDD pin, output of
the regulator, must be connected to a 2.2µF bypass capacitor. VDD only has a current sourcing capability of
15mA. VDD voltage is ready after the EN pin is pulled high.
Boost Controller
A boost controller is shown at the top of the functional block diagram. The TPS61199 regulates the output
voltage with current mode PWM (pulse width modulation) control. The control circuitry turns on an external switch
FET at the beginning of each switching cycle. The input voltage is applied across the inductor and stores the
energy as the inductor current ramps up. During this portion of the switching cycle, the load current is provided
by the output capacitor. When the inductor current rises to the threshold set by the Error Amplifier (EA) output,
the switch FET is turned off and the external Schottky diode is forward biased. The inductor transfers stored
energy to replenish the output capacitor and supply the load current. This operation repeats each switching
cycle. The switching frequency is programmed by the external resistor.
A ramp signal from the oscillator is added to the current ramp to provide slope compensation, shown in the
Oscillator and Slope Compensation block. The duty cycle of the converter is then determined by the PWM Logic
block which compares the EA output and the slope compensated current ramp. The feedback loop regulates the
OVP pin to a reference voltage generated by the minimum voltage across the IFB pins. The output of the EA is
connected to the COMP pin. An external RC compensation network must be connected to the COMP pin to
optimize the feedback loop for stability and transient response.
The IC consistently adjusts the boost output voltage to account for any changes in LED forward voltages. In the
event that the boost controller is not able to regulate the output voltage due to the minimum pulse width (tskip, in
the Electrical Characterization table), the IC enters pulse skip mode. In this mode, the device keeps the power
switch off for several switching cycles to prevent the output voltage from rising above the regulated voltage. This
operation typically occurs in light load condition or when the input voltage is higher than the output voltage.
Switching Frequency
The TPS61199 switching frequency can be programmed between 300kHz to 800kHz by a external resistor (R7,
in Figure 1). Table 2 shows the recommended values for the resistance.
Table 2. Recommended Value for Resistance
R7
FSW
100 kΩ
160 kΩ
800 kHz
500 kHz
Enable And Under Voltage Lockout
The TPS61199 is enabled with the soft-start when the EN pin voltage is higher than 2.0 V; A voltage of less than
0.8 V disables the IC.
An under voltage lockout protection feature is provided. When the voltage at VIN pin is less than 7 V, the IC is
switched off. The IC resumes the operation once the voltage at VIN pin recovers adjusted for hysteresis
(VVIN_SYS, in the Electrical Characterization table)
Startup
The TPS61199 has integrated soft-start circuitry to avoid any inrush current during startup. During the startup
period, the output voltage rises step-by-step from the minimum voltage of LED string in 100 mV increments,
shown in Figure 9. The soft-start time depends on the load and the output capacitor.
Copyright © 2010, Texas Instruments Incorporated
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