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SLVS398D − JUNE 2001 − REVISED JULY 2003
ELECTRICAL CHARACTERISTICS (continued)
over operating free-air temperature range unless otherwise noted
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ERROR AMPLIFIER
(1)
Error amplifier open loop voltage gain
Error amplifier unity gain bandwidth
1 kΩ COMP to AGND
90
3
110
5
dB
(1)
Parallel 10 kΩ, 160 pF COMP to AGND
MHz
Error amplifier common mode input voltage
range
(1)
Powered by internal LDO
0
VBIAS
250
V
Input bias current, VSENSE
VSENSE = V
ref
60
nA
Output voltage slew rate (symmetric), COMP
1.0
1.4
V/µs
PWM COMPARATOR
PWM comparator propagation delay time,
PWM comparator input to PH pin (excluding
deadtime)
(1)
10-mV overdrive
70
85
ns
SLOW-START/ENABLE
Enable threshold voltage, SS/ENA
Enable hysteresis voltage, SS/ENA
0.82
1.20
0.03
2.5
3.35
5
1.40
V
V
(1)
Falling edge deglitch, SS/ENA
µs
ms
µA
mA
Internal slow-start time
2.6
3
4.1
8
Charge current, SS/ENA
Discharge current, SS/ENA
SS/ENA = 0 V
SS/ENA = 0.2 V, V = 2.7 V
I
2.0
2.3
4.0
POWER GOOD
Power good threshold voltage
Power good hysteresis voltage
VSENSE falling
90
3
%V
%V
ref
(1)
(1)
ref
Power good falling edge deglitch
35
µs
Output saturation voltage, PWRGD
Leakage current, PWRGD
I
= 2.5 mA
0.18
0.3
1
V
(sink)
V = 5.5 V
µA
I
CURRENT LIMIT
(1)
(1)
V = 3 V Output shorted
7.2
10
10
12
I
Current limit trip point
A
V = 6 V Output shorted
I
(1)
Current limit leading edge blanking time
100
200
ns
ns
(1)
Current limit total response time
THERMAL SHUTDOWN
Thermal shutdown trip point
(1)
(1)
135
150
10
165
°C
°C
Thermal shutdown hysteresis
OUTPUT POWER MOSFETS
(4)
(4)
V = 6 V
26
36
47
65
I
r
Power MOSFET switches
mΩ
DS(on)
V = 3 V
I
(1)
(2)
(3)
(4)
Specified by design
Static resistive loads only
Specified by the circuit used in Figure 10
Matched MOSFETs low-side r production tested, high-side r
specified by design
DS(on) DS(on)
4
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