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TPS54610 参数 Datasheet PDF下载

TPS54610图片预览
型号: TPS54610
PDF下载: 下载PDF文件 查看货源
内容描述: 3 V至6 V的输入, 6 -A输出,带集成FET的同步降压型PWM SWITCHER [3-V TO 6-V INPUT, 6-A OUTPUT SYNCHRONOUS BUCK PWM SWITCHER WITH INTEGRATED FETs]
分类和应用: 输出元件输入元件
文件页数/大小: 16 页 / 290 K
品牌: TI [ TEXAS INSTRUMENTS ]
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www.ti.com  
ꢀꢁ ꢂ ꢃꢄ ꢅꢆ ꢇ  
SLVS398D − JUNE 2001 − REVISED JULY 2003  
ELECTRICAL CHARACTERISTICS  
over operating free-air temperature range unless otherwise noted  
PARAMETER  
SUPPLY VOLTAGE, VIN  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Input voltage range, VIN  
3.0  
11  
6.0  
V
f = 350 kHz, SYNC 0.8 V, RT open,  
PH pin open  
s
15.8  
f = 550 kHz, SYNC 2.5 V, RT open,  
PH pin open  
I
Quiescent current  
mA  
s
(Q)  
16  
23.5  
1.4  
Shutdown, SS/ENA = 0 V  
1
UNDER VOLTAGE LOCK OUT  
Start threshold voltage, UVLO  
2.95  
2.80  
0.16  
2.5  
3.0  
V
V
Stop threshold voltage, UVLO  
Hysteresis voltage, UVLO  
2.70  
0.14  
V
(1)  
Rising and falling edge deglitch, UVLO  
µs  
BIAS VOLTAGE  
Output voltage, VBIAS  
Output current, VBIAS  
I
= 0  
2.70  
2.80  
2.90  
100  
V
(VBIAS)  
(2)  
µA  
CUMULATIVE REFERENCE  
V
ref  
Accuracy  
0.882 0.891  
0.900  
V
REGULATION  
I
L
I
L
I
L
I
L
= 3 A, f = 350 kHz, T = 85°C  
0.04  
0.04  
0.03  
0.03  
s
J
(1)(3)  
Line regulation  
%/V  
%/A  
= 3 A, f = 550 kHz, T = 85°C  
s
J
= 0 A to 6 A, f = 350 kHz, T = 85°C  
s
J
(1)(3)  
Load regulation  
= 0 A to 6 A, f = 550 kHz, T = 85°C  
s
J
OSCILLATOR  
Internally set—free running frequency  
SYNC 0.8 V,  
SYNC 2.5 V,  
RT open  
RT open  
280  
440  
252  
460  
663  
2.5  
350  
550  
280  
500  
700  
420  
660  
308  
540  
762  
kHz  
kHz  
(1)  
RT = 180 k(1% resistor to AGND)  
RT = 100 k(1% resistor to AGND)  
(1)  
RT = 68 k(1% resistor to AGND)  
Externally set—free running frequency range  
High level threshold, SYNC  
V
V
Low level threshold, SYNC  
0.8  
Pulse duration, external synchronization,  
SYNC  
50  
ns  
(1)  
(1)  
Frequency range, SYNC  
(1)  
330  
700  
kHz  
V
Ramp valley  
Ramp amplitude (peak-to-peak)  
0.75  
1
(1)  
(1)  
V
Minimum controllable on time  
Maximum duty cycle  
200  
ns  
90%  
(1)  
(2)  
(3)  
Specified by design  
Static resistive loads only  
Specified by the circuit used in Figure 10  
3
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