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SLVS456C − OCTOBER 2003 − REVISED OCTOBER 2004
ELECTRICAL CHARACTERISTICS
T = –40°C to 125°C, VIN = 4.5 V to 20 V (unless otherwise noted)
J
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
FEED− FORWARD MODULATOR (INTERNAL SIGNAL)
Modulator gain
VIN = 12 V, T = 25°C
8
V/V
ns
J
Modulator gain variation
Minimum controllable ON time
−25%
80%
25%
(1)
180
(1)
Maximum duty factor
ERROR AMPLIFIER (VSENSE AND COMP PINS)
VIN = 4.5 V
86%
(1)
Error amplifier open loop voltage gain
60
80
dB
MHz
nA
(1)
Error amplifier unity gain bandwidth
Input bias current, VSENSE pin
Output voltage slew rate (symmetric)
1.0
2.8
500
0.5
10
(1)
COMP
1.5
V/µs
ENABLE (ENA PIN)
Disable low level input voltage
V
(1)
f = 250 kHz, RT = ground
4.6
2.3
5
s
Internal slow-start time (10% to 90%)
ms
(1)
f = 500 kHz, RT = Hi−Z
s
Pullup current source
Pulldown MOSFET
1.8
µA
II(ENA)=1 mA
0.1
V
POWER GOOD (PWRGD PIN)
Power good threshold
Rising voltage
fs = 250 kHz
fs = 500 kHz
97%
4
(1)
Rising edge delay
ms
2
Output saturation voltage
Output saturation voltage
Open drain leakage current
I
I
= 1 mA, VIN > 4.5 V
0.05
0.76
V
V
sink
= 100 µA, VIN = 0 V
PWRGD
sink
Voltage on PWRGD = 6 V
3
µA
CURRENT LIMIT
Current limit
Current limit Hiccup Time
THERMAL SHUTDOWN
Thermal shutdown trip point
VIN = 12 V
3.3
4.5
4.5
6.5
A
(1)
f = 500 kHz
s
ms
(1)
165
7
_C
_C
(1)
Thermal shutdown hysteresis
LOW SIDE MOSFET DRIVER (LSG PIN)
Turn on rise time, (10%/90%)
(1)
VIN = 4.5 V, Capacitive load = 1000 pF
VIN = 12 V
15
60
7.5
5
ns
ns
(1)
Deadtime
VIN = 4.5 V sink/source
VIN = 12 V sink/source
Driver ON resistance
Ω
OUTPUT POWER MOSFETS (PH PIN)
Phase node voltage when disabled
DC conditions and no load, ENA = 0 V
VIN = 4.5 V, Idc = 100 mA
0.5
1.13
1.08
150
100
V
V
1.42
1.38
300
200
Voltage drop, low side FET and diode
VIN = 12 V, Idc = 100 mA
VIN = 4.5 V, BOOT−PH = 4.5 V, I = 0.5 A
O
(2)
r , high side power MOSFET switch
DS(ON)
mΩ
VIN = 12 V, BOOT−PH = 8 V, I = 0.5 A
O
(1)
(2)
Ensured by design, not production tested.
Resistance from VIN to PH pins.
4