欢迎访问ic37.com |
会员登录 免费注册
发布采购

TPS54350PWPR 参数 Datasheet PDF下载

TPS54350PWPR图片预览
型号: TPS54350PWPR
PDF下载: 下载PDF文件 查看货源
内容描述: 4.5 V至20 V输入, 3 -A输出同步PWM与INTEGRANTED FET SWITCHER ( SWIFT ) [4.5-V TO 20-V INPUT, 3-A OUTPUT SYNCHRONOUS PWM SWITCHER WITH INTEGRANTED FET(SWIFT)]
分类和应用: 稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管输出元件输入元件
文件页数/大小: 32 页 / 876 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号TPS54350PWPR的Datasheet PDF文件第1页浏览型号TPS54350PWPR的Datasheet PDF文件第2页浏览型号TPS54350PWPR的Datasheet PDF文件第4页浏览型号TPS54350PWPR的Datasheet PDF文件第5页浏览型号TPS54350PWPR的Datasheet PDF文件第6页浏览型号TPS54350PWPR的Datasheet PDF文件第7页浏览型号TPS54350PWPR的Datasheet PDF文件第8页浏览型号TPS54350PWPR的Datasheet PDF文件第9页  
www.ti.com  
ꢀꢁ ꢂ ꢃꢄ ꢅꢃ ꢆ  
SLVS456C − OCTOBER 2003 − REVISED OCTOBER 2004  
RECOMMENDED OPERATING CONDITIONS  
MIN NOM  
MAX  
20  
UNIT  
V
Input voltage range, V  
4.5  
I
Operating junction temperature, T  
−40  
125  
°C  
J
ELECTRICAL CHARACTERISTICS  
T = –40°C to 125°C, VIN = 4.5 V to 20 V (unless otherwise noted)  
J
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
SUPPLY CURRENT  
Operating Current, PH Pin open,  
No external low side MOSFET, RT = Hi-Z  
5
mA  
I
Q
Quiescent current  
Shutdown, ENA = 0 V  
1.0  
4.32  
3.97  
350  
mA  
V
Start threshold voltage  
Stop threshold voltage  
Hysteresis  
4.49  
1.24  
3.69  
1.02  
V
VIN  
mV  
UNDER VOLTAGE LOCK OUT (UVLO PIN)  
Start threshold voltage  
1.20  
1.10  
100  
V
V
Stop threshold voltage  
Hysteresis  
UVLO  
mV  
BIAS VOLTAGE (VBIAS PIN)  
I
I
= 1 mA, VIN 12 V  
7.5  
4.4  
7.8  
8.0  
4.5  
VBIAS  
VBIAS Output voltage  
V
= 1 mA, VIN = 4.5 V  
4.47  
VBIAS  
REFERENCE SYSTEM ACCURACY  
T = 25°C  
J
0.888 0.891 0.894  
0.882 0.891 0.899  
V
V
Reference voltage  
OSCILLATOR (RT PIN)  
RT Grounded  
200  
400  
425  
250  
500  
500  
300  
600  
575  
Internally set PWM switching frequency  
Externally set PWM switching frequency  
kHz  
kHz  
RT Open  
RT = 100 k(1% resistor to AGND)  
FALLING EDGE TRIGGERED BIDIRECTIONAL SYNC SYSTEM (SYNC PIN)  
(1)  
SYNC out low-to-high rise time (10%/90%)  
25 pF to ground  
25 pF to ground  
200  
5
500  
10  
ns  
ns  
(1)  
SYNC out high-to-low fall time (90%/10%)  
Delay from rising edge to rising edge of  
PH pins, see Figure 19  
(1)  
Falling edge delay time  
180  
°
(1)  
Minimum input pulsewidth  
RT = 100 kΩ  
RT = 100 kΩ  
100  
360  
ns  
ns  
(1)  
Delay (falling edge SYNC to rising edge PH)  
SYNC out high level voltage  
50 kresistor to ground, no pullup  
resistor  
2.5  
0.8  
V
SYNC out low level voltage  
SYNC in low level threshold  
SYNC in high level threshold  
0.6  
V
V
V
2.3  
10%  
770  
Percentage of programmed frequency  
−10%  
225  
(1)  
SYNC in frequency range  
kHz  
(1)  
Ensured by design, not production tested.  
3
 复制成功!