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SLVS456C − OCTOBER 2003 − REVISED OCTOBER 2004
rated for a voltage greater than the desired output voltage
plus one half the ripple voltage. Any derating amount must
also be included. The maximum RMS ripple current in the
output capacitor is given by equation 15:
When designing compensation networks for the
TPS54350, a number of factors need to be considered.
The gain of the compensated error amplifier should not be
limited by the open loop amplifier gain characteristics and
should not produce excessive gain at the switching
frequency. Also, the closed loop crossover frequency
should be set less than one fifth of the switching frequency,
and the phase margin at crossover must be greater than
45 degrees. The general procedure outlined here
produces results consistent with these requirements
without going into great detail about the theory of loop
compensation.
ǒ
Ǔ
NCȧ
V
V
* V
ȡ
ȧV
ȣ
OUT
IN(MAX)
L F
OUT
1
I
+
COUT(RMS)
Ǹ
12
Ȣ IN(MAX)
OUT
SW
(16)
Ȥ
where N is the number of output capacitors in parallel.
C
First calculate the output filter LC corner frequency using
equation 17:
The maximum ESR of the output capacitor is
determined by the amount of allowable output ripple as
specified in the initial design parameters. The output
ripple voltage is the inductor ripple current times the
ESR of the output filter so the maximum specified ESR
as listed in the capacitor data sheet is given by equation
16:
1
ƒ
+
LC
2p ǸL
C
OUT OUT
For the design example, f = 5033 Hz.
(18)
LC
The closed loop crossover frequency should be greater
V
L
F
0.8
than f and less than one fifth of the switching frequency.
IN(MAX)
OUT
SW
LC
ESR
+ N
DV
p*p(MAX)
ǒ
Ǔ
MAX
C
Also, the crossover frequency should not exceed 50 kHz,
as the error amplifier may not provide the desired gain. For
this design, a crossover frequency of 30 kHz was chosen.
This value is chosen for comparatively wide loop
bandwidth while still allowing for adequate phase boost to
insure stability.
ǒ
V
OUTǓ
V
* V
IN(MAX)
OUT
(17)
Where nV
is the desired peak-to-peak output ripple.
p−p
For this design example, a single 100-µF output capacitor
is chosen for C2 since the design goal is small size. The
calculated RMS ripple current is 156 mV and the maximum
ESR required is 59 mΩ. A capacitor that meets these
requirements is a Sanyo Poscap 6TPC100M, rated at
6.3 V with a maximum ESR of 45 mΩ and a ripple current
rating of 1.7 A. An additional small 0.1-µF ceramic bypass
capacitor is also used.
Next calculate the R2 resistor value for the output voltage
of 3.3 V using equation 18:
R1 0.891
R2 +
V
* 0.891
OUT
(19)
For any TPS54350 design, start with an R1 value of 1.0 kΩ.
R2 is then 374 Ω.
Other capacitor types work well with the TPS54350,
depending on the needs of the application.
Now the values for the compensation components that set
the poles and zeros of the compensation network can be
calculated. Assuming that R1 > R5 and C6 > C7, the pole
and zero locations are given by equations 19 through 22:
COMPENSATION COMPONENTS
The external compensation used with the TPS54350
allows for a wide range of output filter configurations. A
large range of capacitor values and types of dielectric are
supported. The design example uses type 3 compensation
consisting of R1, R3, R5, C6, C7 and C8. Additionally, R2
along with R1 forms a voltage divider network that sets the
output voltage. These component reference designators
are the same as those used in the SWIFT Designer
Software. There are a number of different ways to design
a compensation network. This procedure outlines a
relatively simple procedure that produces good results
with most output filter combinations. Use of the SWIFT
Designer Software for designs with unusually high closed
loop crossover frequencies, low value, low ESR output
capacitors such as ceramics or if the designer is unsure
about the design procedure is recommended.
1
ƒ
ƒ
ƒ
ƒ
+
+
+
+
Z1
Z2
P1
P2
2pR3C6
(20)
(21)
(22)
(23)
1
2pR1C8
1
2pR5C8
1
2pR3C7
Additionally there is a pole at the origin, which has unity
gain with the following frequency:
1
ƒ
+
INT
2pR1C6
(24)
17
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