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SLVS456C − OCTOBER 2003 − REVISED OCTOBER 2004
amplitude of the ringing depends to a large degree on
parasitic effects, it is best to choose these component
values based on actual measurements of any design
layout. See literature number SLUP100 for more detailed
information on snubber design.
SNUBBER CIRCUIT
R4 and C11 of the application schematic in Figure 24
comprise a snubber circuit. The snubber is included to
reduce over-shoot and ringing on the phase node when the
internal high-side FET turns on. Since the frequency and
U1
L1
10 µH
C3
0.1 µF
TPS54350PWP
6 V − 18 V
VOUT 3.3 V @ 3 A
1
2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
VIN
BOOT
PH
VIN
C9
10 µF
C1
47 µF
UVLO
PH
LSG
R4
4.7
PWRGD
RT
Ω
+
D1
C2
100 µF
VBIAS
SYNC
ENA
PGND
AGND
C4
1 µF
C11
3300 pF
9
COMP
VSENSE
PWRPAD
17
C6
82 nF
R3
768
Ω
R1
C7
1800 pF
1 k
Ω
R5
D1: On Semiconductor MBRS340T3
L1: Vishay IHLP-5050CE
C2: Sanyo 6TPC100M
C8
33 nF
137
R2
374
Ω
Ω
Figure 25. 3.3-V Power Supply With Schottky Diode
Figure 25 shows an application where a clamp diode is
used in place of the low-side FET. The TPS54350
incorporates an integrated pull-down FET so that the
circuit remains operating in continuous mode during light
load operation. A 3-A, 40-V Schottky diode such as the
Motorola MBRS340T3 or equivalent is recommended.
19
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