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TPS51640ARSLR 参数 Datasheet PDF下载

TPS51640ARSLR图片预览
型号: TPS51640ARSLR
PDF下载: 下载PDF文件 查看货源
内容描述: 双通道( 3相CPU / 1相GPU) SVID , D- CAP + ™降压控制器 [Dual-Channel (3-Phase CPU/1-Phase GPU) SVID, D-CAP+? Step-Down Controller for]
分类和应用: 控制器
文件页数/大小: 54 页 / 1760 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TPS51640A, TPS59640, TPS59641  
SLUSAQ2 JANUARY 2012  
www.ti.com  
Table 1. Key External Component Recommendations  
FUNCTION  
High-side MOSFET  
Low-side MOSFET  
Powerblock MOSFET  
MANUFACTURER  
Texas Instruments  
COMPONENT NUMBER  
CSD17302Q5A  
Texas Instruments  
Texas Instruments  
Panasonic  
CSD17303Q5  
CSD87350Q5D  
ETQP4LR36AFC  
MPCH1040LR36,  
MPCG1040LR36  
NEC-Tokin  
TOKO  
Inductors  
FDUE1040J-H-R36,  
FCUL1040xxR36  
ALPS  
GLMDR3601A  
Panasonic  
Sanyo  
EEFLXOD471R4  
2TPLF470M4E  
Bulk Output Capacitors  
KEMET  
Murata  
T528Z477M2R5AT  
GRM21BR60J106KE19L  
GRM21BR60J226ME39L  
ECJ2FB0J106K  
Murata  
Ceramic Output Capacitors  
Panasonic  
Panasonic  
ECJ2FB0J226K  
NCP15WF104F03RC,  
NCP18WF104F03RC  
Murata  
NTC Thermistors  
Sense Resistors  
Panasonic  
Vishay  
ERTJ1VS104F, ERTJ0ES104F  
WSK0612L7500FEA  
Stackpole  
CSSK0612FTL750  
DETAILED DESCRIPTION  
Functional Overview  
The TPS51640A, TPS59640, and TPS59641 are a DCAP+mode adaptive on-time controllers.  
The output voltage is set using a DAC that outputs a reference in accordance with the 8-bit VID code defined in  
Intel IMVP-7 PWM Specification document. In adaptive on-time converters, the controller varies the on-time as a  
function of input and output voltage to maintain a nearly constant frequency during steady-state conditions. In  
conventional voltage-mode constant on-time converters, each cycle begins when the output voltage crosses to a  
fixed reference level. However, in these devices, the cycle begins when the current feedback reaches an error  
voltage level which corresponds to the amplified difference between the DAC voltage and the feedback output  
voltage. In the case of two-phase or three-phase operation, the current feedback from all the phases is summed  
up at the output of the internal current-sense amplifiers.  
This approach has two advantages:  
The amplifier DC gain sets an accurate linear load-line; this is required for CPU core applications.  
The error voltage input to the PWM comparator is filtered to improve the noise performance.  
In addition, the difference of the DAC-to-output voltage and the current feedback goes through an integrator to  
give a more or less linear load-line even at light loads where the inductor current is in discontinuous conduction  
mode (DCM).  
In a steady-state condition, the phases of the TPS51640A, TPS59640, and TPS59641 switch 180°  
phase-displacement for two-phase mode and 120° phase-displacement for three-phase mode. The phase  
displacement is maintained both by the architecture (which does not allow both high-side gate drives to be on in  
any condition except transients) and the current ripple (which forces the pulses to be spaced equally). The  
controller forces current sharing adjusting the on-time of each phase. Current balancing requires no user  
intervention, compensation, or extra components.  
26  
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Copyright © 2012, Texas Instruments Incorporated  
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