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TMS320TCI6487 参数 Datasheet PDF下载

TMS320TCI6487图片预览
型号: TMS320TCI6487
PDF下载: 下载PDF文件 查看货源
内容描述: 通信基础设施数字信号处理器 [Communications Infrastructure Digital Signal Processor]
分类和应用: 数字信号处理器通信
文件页数/大小: 206 页 / 2183 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TMS320TCI6487  
TMS320TCI6488  
Communications Infrastructure Digital Signal Processor  
www.ti.com  
SPRS358FAPRIL 2007REVISED AUGUST 2008  
Table 8-5. EDMA3 Transfer Controller 0 Registers (continued)  
HEX ADDRESS RANGE  
ACRONYM  
DFOPT0  
DFSRC0  
DFCNT0  
DFDST0  
DFBIDX0  
DFMPPRXY0  
-
REGISTER NAME  
02A2 0300  
02A2 0304  
Destination FIFO Options Register 0  
Destination FIFO Source Address Register 0  
Destination FIFO Count Register 0  
Destination FIFO Destination Address Register 0  
Destination FIFO BIDX Register 0  
Destination FIFO Memory Protection Proxy Register 0  
Reserved  
02A2 0308  
02A2 030C  
02A2 0310  
02A2 0314  
02A2 0318 - 02A2 033C  
02A2 0340  
DFOPT1  
DFSRC1  
DFCNT1  
DFDST1  
DFBIDX1  
DFMPPRXY1  
-
Destination FIFO Options Register 1  
Destination FIFO Source Address Register 1  
Destination FIFO Count Register 1  
Destination FIFO Destination Address Register 1  
Destination FIFO BIDX Register 1  
Destination FIFO Memory Protection Proxy Register 1  
Reserved  
02A2 0344  
02A2 0348  
02A2 034C  
02A2 0350  
02A2 0354  
02A2 0358 - 02A2 037C  
02A2 0380  
DFOPT2  
DFSRC2  
DFCNT2  
DFDST2  
DFBIDX2  
DFMPPRXY2  
-
Destination FIFO Options Register 2  
Destination FIFO Source Address Register 2  
Destination FIFO Count Register 2  
Destination FIFO Destination Address Register 2  
Destination FIFO BIDX Register 2  
Destination FIFO Memory Protection Proxy Register 2  
Reserved  
02A2 0384  
02A2 0388  
02A2 038C  
02A2 0390  
02A2 0394  
02A2 0398 - 02A2 03BC  
02A2 03C0  
DFOPT3  
DFSRC3  
DFCNT3  
DFDST3  
DFBIDX3  
DFMPPRXY3  
-
Destination FIFO Options Register 3  
Destination FIFO Source Address Register 3  
Destination FIFO Count Register 3  
Destination FIFO Destination Address Register 3  
Destination FIFO BIDX Register 3  
Destination FIFO Memory Protection Proxy Register 3  
Reserved  
02A2 03C4  
02A2 03C8  
02A2 03CC  
02A2 03D0  
02A2 03D4  
02A2 03D8 - 02A2 7FFC  
Table 8-6. EDMA3 Transfer Controller 1 Registers  
HEX ADDRESS RANGE  
02A2 8000  
ACRONYM  
PID  
REGISTER NAME  
Peripheral Identification Register  
EDMA3TC Configuration Register  
Reserved  
02A2 8004  
TCCFG  
-
02A2 8008 - 02A2 80FC  
02A2 8100  
TCSTAT  
-
EDMA3TC Channel Status Register  
Reserved  
02A2 8104 - 02A2 811C  
02A2 8120  
ERRSTAT  
ERREN  
ERRCLR  
ERRDET  
ERRCMD  
-
Error Register  
02A2 8124  
Error Enable Register  
Error Clear Register  
02A2 8128  
02A2 812C  
Error Details Register  
Error Interrupt Command Register  
Reserved  
02A2 8130  
02A2 8134 - 02A2 813C  
02A2 8140  
RDRATE  
-
Read Rate Register  
02A2 8144 - 02A2 823C  
02A2 8240  
Reserved  
SAOPT  
SASRC  
SACNT  
Source Active Options Register  
Source Active Source Address Register  
Source Active Count Register  
02A2 8244  
02A2 8248  
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Peripheral Information and Electrical Specifications  
95  
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